JPS57159335A - Terminal controlling system - Google Patents

Terminal controlling system

Info

Publication number
JPS57159335A
JPS57159335A JP56044593A JP4459381A JPS57159335A JP S57159335 A JPS57159335 A JP S57159335A JP 56044593 A JP56044593 A JP 56044593A JP 4459381 A JP4459381 A JP 4459381A JP S57159335 A JPS57159335 A JP S57159335A
Authority
JP
Japan
Prior art keywords
memory
host processor
information
instruction
fifo
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56044593A
Other languages
Japanese (ja)
Other versions
JPS6051147B2 (en
Inventor
Tsutomu Iwata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56044593A priority Critical patent/JPS6051147B2/en
Publication of JPS57159335A publication Critical patent/JPS57159335A/en
Publication of JPS6051147B2 publication Critical patent/JPS6051147B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Input From Keyboards Or The Like (AREA)
  • Computer And Data Communications (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To increase the processing ability of a host processor, by storing a corresponding terminal address and depressing key information to a first-in and first-out (FIFO) memory and returning this memory information to a key information reading instruction from the host processor. CONSTITUTION:When an R/W discrimination circuit 6 discriminates an instruction from a host processor 1 as a write instruction, the data is given to an FIFO memory 16 via a priority circuit 9, and the output is transmitted to a terminal device 18. When the response information from the device 18 is received at 20 and all zero of the key information of the reception data is detected at 21, the response information is gated at 22 and the response information is written in an FIFO memory 22. When the output of the circuit 6 is a reading instruction, the content of the memory 23 is transmitted to the host processor 1 via a transmission buffer 5.
JP56044593A 1981-03-26 1981-03-26 Terminal control method Expired JPS6051147B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56044593A JPS6051147B2 (en) 1981-03-26 1981-03-26 Terminal control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56044593A JPS6051147B2 (en) 1981-03-26 1981-03-26 Terminal control method

Publications (2)

Publication Number Publication Date
JPS57159335A true JPS57159335A (en) 1982-10-01
JPS6051147B2 JPS6051147B2 (en) 1985-11-12

Family

ID=12695762

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56044593A Expired JPS6051147B2 (en) 1981-03-26 1981-03-26 Terminal control method

Country Status (1)

Country Link
JP (1) JPS6051147B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63170347U (en) * 1987-04-27 1988-11-07

Also Published As

Publication number Publication date
JPS6051147B2 (en) 1985-11-12

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