JPS57157689A - Television receiver - Google Patents

Television receiver

Info

Publication number
JPS57157689A
JPS57157689A JP56043519A JP4351981A JPS57157689A JP S57157689 A JPS57157689 A JP S57157689A JP 56043519 A JP56043519 A JP 56043519A JP 4351981 A JP4351981 A JP 4351981A JP S57157689 A JPS57157689 A JP S57157689A
Authority
JP
Japan
Prior art keywords
signal
supplied
field
twice
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56043519A
Other languages
Japanese (ja)
Inventor
Akira Hirota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Nippon Victor KK
Original Assignee
Victor Company of Japan Ltd
Nippon Victor KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd, Nippon Victor KK filed Critical Victor Company of Japan Ltd
Priority to JP56043519A priority Critical patent/JPS57157689A/en
Publication of JPS57157689A publication Critical patent/JPS57157689A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0117—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving conversion of the spatial resolution of the incoming video signal
    • H04N7/012—Conversion between an interlaced and a progressive signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Graphics (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Systems (AREA)

Abstract

PURPOSE:To improve vertical resolution by drawing scanning lines twice the present scanning lines in the one field scanning period of a present television receiver. CONSTITUTION:A video signal (a) is supplied to a memory circuit 2 and also supplied to a one field period delay circuit 3 to be converted into a signal (b) delayed by one field period and the signal (b) is supplied to a memory circuit 4. The signal (b) is delayed by one field and 1/2H from the signal (a). Thus at the time a video signal of the 2nd field is supplied to the circuit 2 for example, the video signal of the 1st field is supplied to the circuit 4. A write signal W and a read signal R whose speed is twice that of the write signal W are supplied from a control circuit 5 to the circuits 2 and 4, reading out the written information twice repeatedly with the speed twice the writing speed. Thus, the signals (a) and (b) are read out with the speed twice the writing speed in the circuits 2, 4, and they are designated to signals a' and b' respectively.
JP56043519A 1981-03-24 1981-03-24 Television receiver Pending JPS57157689A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56043519A JPS57157689A (en) 1981-03-24 1981-03-24 Television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56043519A JPS57157689A (en) 1981-03-24 1981-03-24 Television receiver

Publications (1)

Publication Number Publication Date
JPS57157689A true JPS57157689A (en) 1982-09-29

Family

ID=12665988

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56043519A Pending JPS57157689A (en) 1981-03-24 1981-03-24 Television receiver

Country Status (1)

Country Link
JP (1) JPS57157689A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5379421A (en) * 1976-12-24 1978-07-13 Hitachi Ltd Television signal conversion circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5379421A (en) * 1976-12-24 1978-07-13 Hitachi Ltd Television signal conversion circuit

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