JPS57155754A - Mounting structure of resin mold-type high-frequency transistor - Google Patents

Mounting structure of resin mold-type high-frequency transistor

Info

Publication number
JPS57155754A
JPS57155754A JP56040337A JP4033781A JPS57155754A JP S57155754 A JPS57155754 A JP S57155754A JP 56040337 A JP56040337 A JP 56040337A JP 4033781 A JP4033781 A JP 4033781A JP S57155754 A JPS57155754 A JP S57155754A
Authority
JP
Japan
Prior art keywords
pellet
source lead
resin mold
mounting structure
type high
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56040337A
Other languages
Japanese (ja)
Inventor
Kiyomichi Hotta
Akira Masuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56040337A priority Critical patent/JPS57155754A/en
Publication of JPS57155754A publication Critical patent/JPS57155754A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components

Abstract

PURPOSE:To effectively achieve shield and to improve gain attenuation amount at the time of mounting a tuner by a method wherein a pellet is fixed to the inside terminal of a source lead and the lower part and the upper part of the pellet are covered by a ground line and the source lead having the equivalent potential to the ground. CONSTITUTION:In a resin mold type FET3, a pellet 8 is mounted on a wiring substrate 1 so that the pellet 8 may locate at the lower surface of a source lead 9. A resin package 4 is mounted on the ground line 2 of the wiring substrate 1 and the external terminals of two gate leads 11, a drain lead 12, and a source lead 9 are bent downwards. Furthermore the external terminals are reversely bent for horizontality to superimpose the tips on each wiring layer and leads 5 are fixed to a wiring layer 6. In this way, gain attenuation amount at the time of mounting a tuner is improved.
JP56040337A 1981-03-23 1981-03-23 Mounting structure of resin mold-type high-frequency transistor Pending JPS57155754A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56040337A JPS57155754A (en) 1981-03-23 1981-03-23 Mounting structure of resin mold-type high-frequency transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56040337A JPS57155754A (en) 1981-03-23 1981-03-23 Mounting structure of resin mold-type high-frequency transistor

Publications (1)

Publication Number Publication Date
JPS57155754A true JPS57155754A (en) 1982-09-25

Family

ID=12577811

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56040337A Pending JPS57155754A (en) 1981-03-23 1981-03-23 Mounting structure of resin mold-type high-frequency transistor

Country Status (1)

Country Link
JP (1) JPS57155754A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0827200A1 (en) * 1996-08-30 1998-03-04 TEMIC TELEFUNKEN microelectronic GmbH Arrangement for shielding a microelectronic circuit of an integrated circuit
KR20040006180A (en) * 2002-07-11 2004-01-24 삼성전기주식회사 Method for assembling a ic package

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0827200A1 (en) * 1996-08-30 1998-03-04 TEMIC TELEFUNKEN microelectronic GmbH Arrangement for shielding a microelectronic circuit of an integrated circuit
KR20040006180A (en) * 2002-07-11 2004-01-24 삼성전기주식회사 Method for assembling a ic package

Similar Documents

Publication Publication Date Title
EP0162774A3 (en) Improvements in integrated circuit chip processing techniques and integrated circuit chip produced thereby
EP0269008A3 (en) Semiconductor device with improved passivation film and process of fabrication thereof
JPS53980A (en) Field-effect transistor of high dielectric strength
JPS57155754A (en) Mounting structure of resin mold-type high-frequency transistor
GB2059157A (en) Resin encapsulated field-effect transistor
JPS5643740A (en) Semiconductor wafer
JPS54137286A (en) Semiconductor device
JPS56150837A (en) Field-effect transistor
JPS6333823Y2 (en)
JPS54117689A (en) Semiconductor device
JPS57173978A (en) Integrated circuit device
JPS574147A (en) Semiconductor device and its manufacturing process
JPS5776869A (en) Semiconductor device
JPS5772386A (en) Junction type field-effect semiconductor device
JPS5618469A (en) Semiconductor device
JPS556870A (en) Mos type semiconductor device
JPS6428830A (en) Substrate for mounting semiconductor
JPS5784180A (en) Semiconductor device
JPS6445134A (en) Semiconductor device
FR2358023A1 (en) Encapsulated transistor with metal screen - uses screen to prevent unwanted impurity ions penetrating through encapsulant to active zones
JPS5694756A (en) Semiconductor device
JPS6489600A (en) Semiconductor device
JPS56115551A (en) Lead frame for semiconductor device
JPS5414674A (en) Lead fram an resin-sealed electronic parts using it
JPS54157080A (en) Semiconductor device