JPS57150050A - Main storage controller - Google Patents

Main storage controller

Info

Publication number
JPS57150050A
JPS57150050A JP3533681A JP3533681A JPS57150050A JP S57150050 A JPS57150050 A JP S57150050A JP 3533681 A JP3533681 A JP 3533681A JP 3533681 A JP3533681 A JP 3533681A JP S57150050 A JPS57150050 A JP S57150050A
Authority
JP
Japan
Prior art keywords
store
requests
input
main storage
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3533681A
Other languages
Japanese (ja)
Other versions
JPS6122823B2 (en
Inventor
Michitaka Yamamoto
Toshihisa Matsuo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3533681A priority Critical patent/JPS57150050A/en
Publication of JPS57150050A publication Critical patent/JPS57150050A/en
Publication of JPS6122823B2 publication Critical patent/JPS6122823B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To assure an access sequence for both the store and fetch requests, by providing an independent input/output pointer for both requests plus an input/ output pointer for the requests including above-mentioned both requests. CONSTITUTION:When a store request is delivered from a central processor 12 through a store line 3A, the address and the data are fetched to a store stack indicated by a store input pointer 3 and via an address line 1A and a store data line 2A. The control parts 7, 8 and 9 store the producing sequence for both the store and fetch requests which are given from the processor 12 and then deliver the request to a main storage 13 based on the producing sequence. The parts 8 and 9 are equal to the input and output pointers of the store and fetch requests, and the part 7 functions as a storage part for these two requests.
JP3533681A 1981-03-13 1981-03-13 Main storage controller Granted JPS57150050A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3533681A JPS57150050A (en) 1981-03-13 1981-03-13 Main storage controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3533681A JPS57150050A (en) 1981-03-13 1981-03-13 Main storage controller

Publications (2)

Publication Number Publication Date
JPS57150050A true JPS57150050A (en) 1982-09-16
JPS6122823B2 JPS6122823B2 (en) 1986-06-03

Family

ID=12438989

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3533681A Granted JPS57150050A (en) 1981-03-13 1981-03-13 Main storage controller

Country Status (1)

Country Link
JP (1) JPS57150050A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60142439A (en) * 1983-12-29 1985-07-27 Fujitsu Ltd Store buffer device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60142439A (en) * 1983-12-29 1985-07-27 Fujitsu Ltd Store buffer device

Also Published As

Publication number Publication date
JPS6122823B2 (en) 1986-06-03

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