JPS5714962A - Computer - Google Patents

Computer

Info

Publication number
JPS5714962A
JPS5714962A JP8871380A JP8871380A JPS5714962A JP S5714962 A JPS5714962 A JP S5714962A JP 8871380 A JP8871380 A JP 8871380A JP 8871380 A JP8871380 A JP 8871380A JP S5714962 A JPS5714962 A JP S5714962A
Authority
JP
Japan
Prior art keywords
melody
gate
output
power supply
supply switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8871380A
Other languages
Japanese (ja)
Inventor
Katsuhiko Sakaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP8871380A priority Critical patent/JPS5714962A/en
Publication of JPS5714962A publication Critical patent/JPS5714962A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Calculators And Similar Devices (AREA)

Abstract

PURPOSE:To obtain a computer which output a melody in response to turn on of a power supply switch. CONSTITUTION:When a power supply switch S is turned on, the logic signal ''1'' is delivered through a one-shot OS. Then an address counter AC is reset through an OR gate OR1 to designate the address 0. A melody and the information on the melody are stored in the 0-60 addresses A of a memory ROM. A process part CPL advances an address counter AC successively by an increment counter C, an AND gate AG and an OR gate OR2, and the contents of these are read successively. Then the melody output is processed by driving a melody driver SD and a speaker SP. If a calculation key K2 is pushed on the way of the process of melody output, a process part CPU jumps to B of the arithmetic routine to start arithmetic process.
JP8871380A 1980-06-30 1980-06-30 Computer Pending JPS5714962A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8871380A JPS5714962A (en) 1980-06-30 1980-06-30 Computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8871380A JPS5714962A (en) 1980-06-30 1980-06-30 Computer

Publications (1)

Publication Number Publication Date
JPS5714962A true JPS5714962A (en) 1982-01-26

Family

ID=13950533

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8871380A Pending JPS5714962A (en) 1980-06-30 1980-06-30 Computer

Country Status (1)

Country Link
JP (1) JPS5714962A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5055779A (en) * 1973-09-19 1975-05-16
JPS54173502U (en) * 1978-05-26 1979-12-07

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5055779A (en) * 1973-09-19 1975-05-16
JPS54173502U (en) * 1978-05-26 1979-12-07

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