JPS57143951A - Stereophonic demodulator - Google Patents
Stereophonic demodulatorInfo
- Publication number
- JPS57143951A JPS57143951A JP2845781A JP2845781A JPS57143951A JP S57143951 A JPS57143951 A JP S57143951A JP 2845781 A JP2845781 A JP 2845781A JP 2845781 A JP2845781 A JP 2845781A JP S57143951 A JPS57143951 A JP S57143951A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- frequency
- inputted
- frequency divider
- demodulator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04H—BROADCAST COMMUNICATION
- H04H40/00—Arrangements specially adapted for receiving broadcast information
- H04H40/18—Arrangements characterised by circuits or components specially adapted for receiving
- H04H40/27—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
- H04H40/36—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
- H04H40/45—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D1/00—Demodulation of amplitude-modulated oscillations
- H03D1/22—Homodyne or synchrodyne circuits
- H03D1/2209—Decoders for simultaneous demodulation and decoding of signals composed of a sum-signal and a suppressed carrier, amplitude modulated by a difference signal, e.g. stereocoders
- H03D1/2236—Decoders for simultaneous demodulation and decoding of signals composed of a sum-signal and a suppressed carrier, amplitude modulated by a difference signal, e.g. stereocoders using a phase locked loop
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04H—BROADCAST COMMUNICATION
- H04H40/00—Arrangements specially adapted for receiving broadcast information
- H04H40/18—Arrangements characterised by circuits or components specially adapted for receiving
- H04H40/27—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
- H04H40/36—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
- H04H40/45—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving
- H04H40/72—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving for noise suppression
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Power Engineering (AREA)
- Stereo-Broadcasting Methods (AREA)
Abstract
PURPOSE:To stabilize the operation of a demodulator by improving its SCA signal elimination ratio, by canceling each other an SCA signal and an unnecessary signal included in a composite signal, and a beat signal brought out by higher harmonics of a subcarrier frequency. CONSTITUTION:The oscillation frequency of the VCO7 of a PLL type stereophonic demodulator is set N times as high as a subcarrier frequency, and then divided by frequency dividers 101 and 102 to the subcarrier frequency, and the result is further divided by a frequency divider 9 and inputted to a phase comparator 4. The output of the frequency divider 102 is supplied to a waveform shaping circuit 104 to generate a sampling signal with short pulse width, which is switched as prescribed by switching circuits 106 and 108 and held by holding amplifier 110 and 112, whose outputs are inputted to mixers 113 and 114. The output of the frequency divider 101 is multiplied by a composite signal through analog multiplying circuits 105 and 107, and the resulting signals are inputted through LPFs 109 and 111 to the mixers 113 and 114; and the outputs of the LPFs and those of the amplifiers 110 and 112 are operated by gain adjustment, thus canceling beats.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2845781A JPS57143951A (en) | 1981-03-02 | 1981-03-02 | Stereophonic demodulator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2845781A JPS57143951A (en) | 1981-03-02 | 1981-03-02 | Stereophonic demodulator |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57143951A true JPS57143951A (en) | 1982-09-06 |
Family
ID=12249188
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2845781A Pending JPS57143951A (en) | 1981-03-02 | 1981-03-02 | Stereophonic demodulator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57143951A (en) |
-
1981
- 1981-03-02 JP JP2845781A patent/JPS57143951A/en active Pending
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