JPS5643843A - Am stereophonic demodulating circuit - Google Patents
Am stereophonic demodulating circuitInfo
- Publication number
- JPS5643843A JPS5643843A JP11940879A JP11940879A JPS5643843A JP S5643843 A JPS5643843 A JP S5643843A JP 11940879 A JP11940879 A JP 11940879A JP 11940879 A JP11940879 A JP 11940879A JP S5643843 A JPS5643843 A JP S5643843A
- Authority
- JP
- Japan
- Prior art keywords
- output
- pll
- locked
- outputs
- demodulating circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04H—BROADCAST COMMUNICATION
- H04H20/00—Arrangements for broadcast or for distribution combined with broadcast
- H04H20/86—Arrangements characterised by the broadcast information itself
- H04H20/88—Stereophonic broadcast systems
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Stereo-Broadcasting Methods (AREA)
Abstract
PURPOSE:To facilitate tuning by preventing the generation of a beat tone by obtaining a sound output by switching the output of envelope detection to L and R output terminals even while PLL is not locked. CONSTITUTION:While PLL is locked, change-over switches 16 and 17 are placed at the opposite positions to those in the figure to connect the output of mixing circuit 9 to outputs 10 and 11. While PLL is not locked, switches 16 and 17 are set as shown in the figure to lead the output signal of envelope detector 15 to outputs 10 and 11. Therefore, when detuning occurs within the intermediate frequency band width, detector 15 outputs a sound signal, so that the tuning can be facilitated.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11940879A JPS5643843A (en) | 1979-09-19 | 1979-09-19 | Am stereophonic demodulating circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11940879A JPS5643843A (en) | 1979-09-19 | 1979-09-19 | Am stereophonic demodulating circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5643843A true JPS5643843A (en) | 1981-04-22 |
Family
ID=14760725
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11940879A Pending JPS5643843A (en) | 1979-09-19 | 1979-09-19 | Am stereophonic demodulating circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5643843A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60109803A (en) * | 1983-11-18 | 1985-06-15 | 衣川 勝治 | Peeling device for face plate for concrete block |
JPS6177427A (en) * | 1984-09-25 | 1986-04-21 | Fujitsu Ten Ltd | Unlock detection circuit |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4120064Y1 (en) * | 1965-10-29 | 1966-09-21 | ||
JPS4220906Y1 (en) * | 1965-02-15 | 1967-12-05 | ||
JPS5377730U (en) * | 1976-11-27 | 1978-06-28 |
-
1979
- 1979-09-19 JP JP11940879A patent/JPS5643843A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4220906Y1 (en) * | 1965-02-15 | 1967-12-05 | ||
JPS4120064Y1 (en) * | 1965-10-29 | 1966-09-21 | ||
JPS5377730U (en) * | 1976-11-27 | 1978-06-28 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60109803A (en) * | 1983-11-18 | 1985-06-15 | 衣川 勝治 | Peeling device for face plate for concrete block |
JPS6177427A (en) * | 1984-09-25 | 1986-04-21 | Fujitsu Ten Ltd | Unlock detection circuit |
JPH0584689B2 (en) * | 1984-09-25 | 1993-12-02 | Fujitsu Ten Ltd |
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