JPS55135476A - Sound multiple demodulator - Google Patents

Sound multiple demodulator

Info

Publication number
JPS55135476A
JPS55135476A JP4286779A JP4286779A JPS55135476A JP S55135476 A JPS55135476 A JP S55135476A JP 4286779 A JP4286779 A JP 4286779A JP 4286779 A JP4286779 A JP 4286779A JP S55135476 A JPS55135476 A JP S55135476A
Authority
JP
Japan
Prior art keywords
sound
frequency
demodulator
signal
sound multiple
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4286779A
Other languages
Japanese (ja)
Inventor
Toshio Matsuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP4286779A priority Critical patent/JPS55135476A/en
Publication of JPS55135476A publication Critical patent/JPS55135476A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04H—BROADCAST COMMUNICATION
    • H04H40/00—Arrangements specially adapted for receiving broadcast information
    • H04H40/18—Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/36—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/60—Receiver circuitry for the reception of television signals according to analogue transmission standards for the sound signals
    • H04N5/607—Receiver circuitry for the reception of television signals according to analogue transmission standards for the sound signals for more than one sound signal, e.g. stereo, multilanguages

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Multimedia (AREA)
  • Television Receiver Circuits (AREA)
  • Stereo-Broadcasting Methods (AREA)

Abstract

PURPOSE:To realize a sound multiple demodulator with a lower cost by using no lead filter but by carrying out the frequency decision for the discrimination signal featuring the 1st or 2nd frequency in order to give the discrimination for the stereo or hetero-sound broadcasts each. CONSTITUTION:The demodulator circuit demodulates the pilot signal which is modulated by the 1st or 2nd frequency contained in the sound multiple signal. The PLL circuit features the free-running frequency which equals to the integer- fold value of the intermediate frequency between the 1st and 2nd frequencies, and is then locked by the output of the demodulator circuit. Thus the control signal which switches the demodulating actions among the stereo, hetero-sound and monaural broadcasts each in the sound multiple demodulator circuit based on the phase error voltage of the PLL circuit.
JP4286779A 1979-04-09 1979-04-09 Sound multiple demodulator Pending JPS55135476A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4286779A JPS55135476A (en) 1979-04-09 1979-04-09 Sound multiple demodulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4286779A JPS55135476A (en) 1979-04-09 1979-04-09 Sound multiple demodulator

Publications (1)

Publication Number Publication Date
JPS55135476A true JPS55135476A (en) 1980-10-22

Family

ID=12647977

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4286779A Pending JPS55135476A (en) 1979-04-09 1979-04-09 Sound multiple demodulator

Country Status (1)

Country Link
JP (1) JPS55135476A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59165526A (en) * 1983-03-10 1984-09-18 Matsushita Electric Ind Co Ltd Phase locked loop circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5934035A (en) * 1982-08-21 1984-02-24 Nissan Motor Co Ltd Checking mechanism for durability limit of taper leaf spring

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5934035A (en) * 1982-08-21 1984-02-24 Nissan Motor Co Ltd Checking mechanism for durability limit of taper leaf spring

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59165526A (en) * 1983-03-10 1984-09-18 Matsushita Electric Ind Co Ltd Phase locked loop circuit

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