JPS57141153A - Signal inserting circuit - Google Patents

Abstract

PURPOSE:To simplify circuit constitution by generating two synchronizing inserted signals and two synchronizing latch signals, and by performing insertion control by selecting one signal by phase comparisons between a position specifying pulse and the synchronizing lath signals. CONSTITUTION:An inserted signal (c) is written in a shift register 8 by a clock (b) to output the 1st and 2nd synchronizing inserted signals (l) and (m). Further, a signal (d) having a frame interval obtained by dividing the frequency of the clock (b) is written in a shift register 7 to output the 1st and 2nd latch signals (i) and (j) for latching the inserted signal (c). A phase comparing circuit 9 compares the phases of the synchronizing latch signals (i) and (j) with that of a position specifying pulse (e) to select the synchronizing latch signal (i) or (j). On the basis of the output of the phase comparing circuit 9, selectors 10 and 11 select, e.g., the 2nd synchronizing latch signal (j) and 2nd synchronizing inserted signal (m). Further, a shift register 12 reads a signal (n) from the selector 11, and the signal is latched by a latch circuit 13 with a synchronizing latch signal (k) to be inserted by a shift register 14.