JPS55145462A - Reproducing circuit of transmission data - Google Patents

Reproducing circuit of transmission data

Info

Publication number
JPS55145462A
JPS55145462A JP5381379A JP5381379A JPS55145462A JP S55145462 A JPS55145462 A JP S55145462A JP 5381379 A JP5381379 A JP 5381379A JP 5381379 A JP5381379 A JP 5381379A JP S55145462 A JPS55145462 A JP S55145462A
Authority
JP
Japan
Prior art keywords
noise
input end
pulse signal
data pulse
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5381379A
Other languages
Japanese (ja)
Inventor
Hidenori Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP5381379A priority Critical patent/JPS55145462A/en
Publication of JPS55145462A publication Critical patent/JPS55145462A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/20—Arrangements for detecting or preventing errors in the information received using signal quality detector

Landscapes

  • Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)

Abstract

PURPOSE:To reproduce the correct data with the noise eliminated even though the noise may be piled upon the data pulse signal transmitted, by constituting the circuit with the shift register, the exclusive OR gate and the latch memory each. CONSTITUTION:Shift register 1 supplies the data pulse signal to input end INPUT and at the same time gives the sequential shifting to outputs QA and QB with the rise of the clock pulse signal which is supplied to input end CLOCK. On the other hand, latch memory 4 supplies the data pulse signal to input end D, and the output of exclusive OR gate 5 which secures the exclusive logic sum between outputs QA and QB is supplied to input end CLOCK. Thus the latching timing is obtained with the gate output. As a result, the signal free from the effect of the noise can be obtained at the output of memory 4 even though the noise may be piled upon the middle part between the data pulse signals.
JP5381379A 1979-04-30 1979-04-30 Reproducing circuit of transmission data Pending JPS55145462A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5381379A JPS55145462A (en) 1979-04-30 1979-04-30 Reproducing circuit of transmission data

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5381379A JPS55145462A (en) 1979-04-30 1979-04-30 Reproducing circuit of transmission data

Publications (1)

Publication Number Publication Date
JPS55145462A true JPS55145462A (en) 1980-11-13

Family

ID=12953226

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5381379A Pending JPS55145462A (en) 1979-04-30 1979-04-30 Reproducing circuit of transmission data

Country Status (1)

Country Link
JP (1) JPS55145462A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57174797A (en) * 1981-04-20 1982-10-27 Victor Company Of Japan Generator for timing

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57174797A (en) * 1981-04-20 1982-10-27 Victor Company Of Japan Generator for timing

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