JPS57133793A - Scanning circuit - Google Patents
Scanning circuitInfo
- Publication number
- JPS57133793A JPS57133793A JP1985281A JP1985281A JPS57133793A JP S57133793 A JPS57133793 A JP S57133793A JP 1985281 A JP1985281 A JP 1985281A JP 1985281 A JP1985281 A JP 1985281A JP S57133793 A JPS57133793 A JP S57133793A
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- circuit
- transition
- scanning
- terminal data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q3/00—Selecting arrangements
- H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
- H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
- H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
- H04Q3/54575—Software application
- H04Q3/54591—Supervision, e.g. fault localisation, traffic measurements, avoiding errors, failure recovery, monitoring, statistical analysis
Abstract
PURPOSE:To reduce the burden in a central processing unit and a storage device, by providing a circuit if the status transition of terminal is caused to a scanning circuit. CONSTITUTION:Designated information at a terminal is transferred from a terminal data automatic transmission instruction circuit AS to a control circuit CONT, the information is converted to address information corresponding to the said terminal, the terminal data obtained at the previous scanning stored in the said address of the terminal data storage memory M is read out and it is inputted to a transition deciding circuit T together with the terminal data received at the terminal data reception circuit R at this scanning to discriminate the two terminal data for coincidence or dissidence. In case of coincidence, since no status transition is caused, the data is stored in the address corresponding to the said terminal of the transition data storage memory TM through the control of control circuit CONT. In case of dissidence, since the status transition is caused, the reception information at the scanning is abolished by the transition diciding circuit T and the content of the memory T is kept as the previous content.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985281A JPS57133793A (en) | 1981-02-13 | 1981-02-13 | Scanning circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985281A JPS57133793A (en) | 1981-02-13 | 1981-02-13 | Scanning circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57133793A true JPS57133793A (en) | 1982-08-18 |
Family
ID=12010769
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1985281A Pending JPS57133793A (en) | 1981-02-13 | 1981-02-13 | Scanning circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57133793A (en) |
-
1981
- 1981-02-13 JP JP1985281A patent/JPS57133793A/en active Pending
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