JPS57131174A - Synchronizing separator circuit - Google Patents

Abstract

PURPOSE:To obtain a vertical synchronizing separator circuit which is strong against a ghost, etc. by generating and outputting a pulse through the first adding filter consisting of a circuit for delaying an input signal by T1 seconds each, the second adding filter consisting of a circuit for delaying it by T2 seconds, and an LPF. CONSTITUTION:This synchronizing separator circuit is provided with the first adding filter SAA for adding and totaling the output signals of 5 delaying circuits DL1-DL5 for delaying an input signal from a terminal l1 for an almost constant interval of time, for instance, T1=TH/2(5+1)=5.29mus each (TH: a horizontal scanning period), and the input signal, in the same amplitude ratio by an adding circuit ADA> Subsequently, the second adding filter consisting of a circuit DL6, etc. for delaying an input signal of a terminal l3 for an almost constant interval of time T2=TH/2=29.1mus is provided, and an equalizing pulse and a horizontal synchronizing signal component are removed. Also, a low-pass filter LPF for removing an unnecessary high frequency component is provided between said filters, and after that, a peak-to-peak value of a vertical synchronizing signal is clamped by a pulse generating circuit PGN, and is sliced and outputted to a terminal l5. According to this constitution, it is possible to obtain a vertical synchronizing signal separating circuit which is stable against a ghost and excellent in a noise resisting property.