JPS57129521A - Analog-to-digital converting system - Google Patents

Analog-to-digital converting system

Info

Publication number
JPS57129521A
JPS57129521A JP1494081A JP1494081A JPS57129521A JP S57129521 A JPS57129521 A JP S57129521A JP 1494081 A JP1494081 A JP 1494081A JP 1494081 A JP1494081 A JP 1494081A JP S57129521 A JPS57129521 A JP S57129521A
Authority
JP
Japan
Prior art keywords
data bus
analog
circuit
multiplexer
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1494081A
Other languages
Japanese (ja)
Inventor
Masaaki Hashimoto
Takashi Tsukahara
Masaki Obara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Fuji Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd, Fuji Electric Manufacturing Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP1494081A priority Critical patent/JPS57129521A/en
Publication of JPS57129521A publication Critical patent/JPS57129521A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/05—Digital input using the sampling of an analogue quantity at regular intervals of time, input from a/d converter or output to d/a converter

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To immediately read in the input data when necessary and at the same time to avoid lowering the executing and processing capacity of a microcomputer system. CONSTITUTION:Plural analog signals A1-An are applied to a multiplexer 1. The multiplexer 1 selects a prescribed analog address counter 15 and applies the analog signal to a sample holding circuit 2. The output of the circuit 2 is applied to an A/D converter 3 to be converted into a digital signal and then connected to a memory 22 via a digital data bus 7, a gate 21 and a converter data bus 27. On the other hand, a data bus 31 connected to a microcomputer system 26 is also connected to the memory 22 via a gate 23 and an internal data bus 30. Various types of control signals are delivered from a control circuit 4 to control the working of each circuit.
JP1494081A 1981-02-05 1981-02-05 Analog-to-digital converting system Pending JPS57129521A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1494081A JPS57129521A (en) 1981-02-05 1981-02-05 Analog-to-digital converting system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1494081A JPS57129521A (en) 1981-02-05 1981-02-05 Analog-to-digital converting system

Publications (1)

Publication Number Publication Date
JPS57129521A true JPS57129521A (en) 1982-08-11

Family

ID=11874949

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1494081A Pending JPS57129521A (en) 1981-02-05 1981-02-05 Analog-to-digital converting system

Country Status (1)

Country Link
JP (1) JPS57129521A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1987003114A1 (en) * 1985-11-09 1987-05-21 Burr-Brown Limited Method and apparatus for interfacing between analog signals and a system bus
JPH01112823A (en) * 1987-10-27 1989-05-01 Fanuc Ltd A/d converter circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1987003114A1 (en) * 1985-11-09 1987-05-21 Burr-Brown Limited Method and apparatus for interfacing between analog signals and a system bus
JPH01112823A (en) * 1987-10-27 1989-05-01 Fanuc Ltd A/d converter circuit

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