JPS6467019A - Digital signal processor - Google Patents

Digital signal processor

Info

Publication number
JPS6467019A
JPS6467019A JP22353187A JP22353187A JPS6467019A JP S6467019 A JPS6467019 A JP S6467019A JP 22353187 A JP22353187 A JP 22353187A JP 22353187 A JP22353187 A JP 22353187A JP S6467019 A JPS6467019 A JP S6467019A
Authority
JP
Japan
Prior art keywords
memory
digital
signal
stored
converters
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22353187A
Other languages
Japanese (ja)
Inventor
Takao Asaka
Hiroaki Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Yokogawa Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Electric Corp filed Critical Yokogawa Electric Corp
Priority to JP22353187A priority Critical patent/JPS6467019A/en
Publication of JPS6467019A publication Critical patent/JPS6467019A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To attain digital signal processing even when number of analog input signal systems is increased, by adding a digital signal of M-set of corresponding A/D converters or a digital signal of (N-M) sets of A/D converters stored in a memory to M-set of digital filters. CONSTITUTION:When the output of a tri-state buffer 10 such as a multiplexer 4 is set to a high impedance, the multiplexer 4 is disconnected from a data bus 5 and the digital filter 3 and the memory 6 are connected via a data bus 5. In this state, the output signal of the A/D converter 22 stored in the memory 6 is outputted sequentially to the digital filter 3 to apply signal processing. Thus, the number of digital filters is decreased more than the number of A/D converters and the memory capacity is reduced more than the constitution that the output signal of each A/D converter is stored in the memory and then the signal stored in the memory is fed to the digital filter.
JP22353187A 1987-09-07 1987-09-07 Digital signal processor Pending JPS6467019A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22353187A JPS6467019A (en) 1987-09-07 1987-09-07 Digital signal processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22353187A JPS6467019A (en) 1987-09-07 1987-09-07 Digital signal processor

Publications (1)

Publication Number Publication Date
JPS6467019A true JPS6467019A (en) 1989-03-13

Family

ID=16799609

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22353187A Pending JPS6467019A (en) 1987-09-07 1987-09-07 Digital signal processor

Country Status (1)

Country Link
JP (1) JPS6467019A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0644700A3 (en) * 1993-09-16 1996-05-29 Sony Corp Sampling rate converting system.

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0644700A3 (en) * 1993-09-16 1996-05-29 Sony Corp Sampling rate converting system.

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