JPS57127256A - System for detecting falling of program into loop - Google Patents

System for detecting falling of program into loop

Info

Publication number
JPS57127256A
JPS57127256A JP56012040A JP1204081A JPS57127256A JP S57127256 A JPS57127256 A JP S57127256A JP 56012040 A JP56012040 A JP 56012040A JP 1204081 A JP1204081 A JP 1204081A JP S57127256 A JPS57127256 A JP S57127256A
Authority
JP
Japan
Prior art keywords
program
output
loop
counter
becomes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56012040A
Other languages
Japanese (ja)
Inventor
Shigeo Matsunaga
Yoshio Iizuka
Tsutomu Oshima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56012040A priority Critical patent/JPS57127256A/en
Publication of JPS57127256A publication Critical patent/JPS57127256A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To detect falling of a program into a loop, by providing a simple circuit additionally without executing a special instruction in the program. CONSTITUTION:When a signal R/W becomes 1, the reset of a counter 8 is released to release the count. However, in the normal operation the signal R/W becomes 0, and the counter 8 is reset before the output is issued to an output terminal CO. When the program falls into a loop, the output of the output terminal CO becomes 1 because the read state continues over T sec, and the inverted output is applied to an enable terminal CE of the counter 8 and a reset terminal R of a processor 6, and the output state of the counter 8 is held in 1, and the processor 6 is returned to the initial state. Simultaneously, an LED9 is lit to indicate the occurrence of falling of the program into a loop to the external.
JP56012040A 1981-01-29 1981-01-29 System for detecting falling of program into loop Pending JPS57127256A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56012040A JPS57127256A (en) 1981-01-29 1981-01-29 System for detecting falling of program into loop

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56012040A JPS57127256A (en) 1981-01-29 1981-01-29 System for detecting falling of program into loop

Publications (1)

Publication Number Publication Date
JPS57127256A true JPS57127256A (en) 1982-08-07

Family

ID=11794480

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56012040A Pending JPS57127256A (en) 1981-01-29 1981-01-29 System for detecting falling of program into loop

Country Status (1)

Country Link
JP (1) JPS57127256A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5597645A (en) * 1979-01-17 1980-07-25 Hitachi Ltd Microprocessor control system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5597645A (en) * 1979-01-17 1980-07-25 Hitachi Ltd Microprocessor control system

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