JPS57126132A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57126132A
JPS57126132A JP56010442A JP1044281A JPS57126132A JP S57126132 A JPS57126132 A JP S57126132A JP 56010442 A JP56010442 A JP 56010442A JP 1044281 A JP1044281 A JP 1044281A JP S57126132 A JPS57126132 A JP S57126132A
Authority
JP
Japan
Prior art keywords
bump
barrier metal
layer
reliability
heat treatment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56010442A
Other languages
Japanese (ja)
Inventor
Makoto Koshikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Holdings Co Ltd
Citizen Watch Co Ltd
Original Assignee
Citizen Holdings Co Ltd
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Holdings Co Ltd, Citizen Watch Co Ltd filed Critical Citizen Holdings Co Ltd
Priority to JP56010442A priority Critical patent/JPS57126132A/en
Publication of JPS57126132A publication Critical patent/JPS57126132A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To ensure eutectic bonding, an to improve yield and reliability by forming a bump electrode through barrier metals through a lift-off method, increasing the closely adhesive force of the interface between the metals through heat treatment and grinding the surface of a bump. CONSTITUTION:An opening 3a is shaped to a passivation film 3 coating an electrode pad 2a on a Si substrate 1 on which an IC, etc. are formed, and the barrier metal layer 5 of Cr and Ag is evaporated onto the whole surface through a spacer resist layer 4. A plating resist layer 6 is shaped, the Au bump 7 is plated, the resist layers 4, 6 are removed, the barrier metal section used as a common electrode is removed, and the whole is thermally treated in order to increase adhesive property. A barrier metal diffusion layer 8a formed onto the surface of the bump through heat treatment is ground and removed. Accord- ingly, the inhibition of bonding through an Au/Sn eutectic by the existence of the diffusion layer 8a can be eliminated, and the yield and reliability of mounting can be improved.
JP56010442A 1981-01-27 1981-01-27 Manufacture of semiconductor device Pending JPS57126132A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56010442A JPS57126132A (en) 1981-01-27 1981-01-27 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56010442A JPS57126132A (en) 1981-01-27 1981-01-27 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS57126132A true JPS57126132A (en) 1982-08-05

Family

ID=11750262

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56010442A Pending JPS57126132A (en) 1981-01-27 1981-01-27 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57126132A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62210649A (en) * 1986-03-12 1987-09-16 Toshiba Corp Semiconductor device and manufacture thereof
US20110278720A1 (en) * 2009-02-04 2011-11-17 Panasonic Corporation Semiconductor substrate structure and semiconductor device
CN102459061A (en) * 2009-06-02 2012-05-16 罗伯特·博世有限公司 Micromechanical component and method for producing a micromechanical component

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62210649A (en) * 1986-03-12 1987-09-16 Toshiba Corp Semiconductor device and manufacture thereof
JPH0328058B2 (en) * 1986-03-12 1991-04-17 Tokyo Shibaura Electric Co
US20110278720A1 (en) * 2009-02-04 2011-11-17 Panasonic Corporation Semiconductor substrate structure and semiconductor device
US8378505B2 (en) * 2009-02-04 2013-02-19 Panasonic Corporation Semiconductor substrate structure and semiconductor device
CN102459061A (en) * 2009-06-02 2012-05-16 罗伯特·博世有限公司 Micromechanical component and method for producing a micromechanical component
CN102459061B (en) * 2009-06-02 2015-02-18 罗伯特·博世有限公司 Micromechanical component and method for producing a micromechanical component
US9593011B2 (en) 2009-06-02 2017-03-14 Robert Bosch Gmbh Micromechanical component and method for producing a micromechanical component

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