JPS5712495A - Memory control system - Google Patents
Memory control systemInfo
- Publication number
- JPS5712495A JPS5712495A JP8396880A JP8396880A JPS5712495A JP S5712495 A JPS5712495 A JP S5712495A JP 8396880 A JP8396880 A JP 8396880A JP 8396880 A JP8396880 A JP 8396880A JP S5712495 A JPS5712495 A JP S5712495A
- Authority
- JP
- Japan
- Prior art keywords
- error
- information
- correction
- correct
- selector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
Abstract
PURPOSE:To strengthen the protection for breakdown of information on a main storage, by checking whether plural storage divices having the same real address have some error or not or securing a normal continuation of process if a correctable erroneous information exists. CONSTITUTION:In case a correction of error is impossible in a mechanism (ECC mechanism) 31 that detects or correct an error and no error is detected or an error can be corrected in an ECC mechanism 30, a selector 34 selcts a new information obtained from the mechanism 30 to send it to a CPU or a channel. At the same time, this information is sent to a memory unit having a correction unable information via a selector 33 to perform a writing action. In such way, the correct information can be sent to the access originator when no error is detected in either one of the mechanisms 30 and 31 or an error correction is possible, and at the same time the information with which an error correction is impossible with use of an error correction code can be restored in a correct way.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55083968A JPS6024493B2 (en) | 1980-06-23 | 1980-06-23 | Memory control method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55083968A JPS6024493B2 (en) | 1980-06-23 | 1980-06-23 | Memory control method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5712495A true JPS5712495A (en) | 1982-01-22 |
JPS6024493B2 JPS6024493B2 (en) | 1985-06-13 |
Family
ID=13817339
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55083968A Expired JPS6024493B2 (en) | 1980-06-23 | 1980-06-23 | Memory control method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6024493B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6386051A (en) * | 1986-09-30 | 1988-04-16 | Toshiba Corp | Memory device |
JP2014174670A (en) * | 2013-03-07 | 2014-09-22 | Hitachi Ulsi Systems Co Ltd | Semiconductor integrated circuit device |
-
1980
- 1980-06-23 JP JP55083968A patent/JPS6024493B2/en not_active Expired
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6386051A (en) * | 1986-09-30 | 1988-04-16 | Toshiba Corp | Memory device |
JP2014174670A (en) * | 2013-03-07 | 2014-09-22 | Hitachi Ulsi Systems Co Ltd | Semiconductor integrated circuit device |
Also Published As
Publication number | Publication date |
---|---|
JPS6024493B2 (en) | 1985-06-13 |
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