JPS57121740A - Data processor - Google Patents

Data processor

Info

Publication number
JPS57121740A
JPS57121740A JP639181A JP639181A JPS57121740A JP S57121740 A JPS57121740 A JP S57121740A JP 639181 A JP639181 A JP 639181A JP 639181 A JP639181 A JP 639181A JP S57121740 A JPS57121740 A JP S57121740A
Authority
JP
Japan
Prior art keywords
operand
buffer
prefetched
prp
pointer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP639181A
Other languages
Japanese (ja)
Inventor
Takaaki Nishiyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP639181A priority Critical patent/JPS57121740A/en
Publication of JPS57121740A publication Critical patent/JPS57121740A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching

Abstract

PURPOSE:To fill each buffer uniformly, by detecting the quantity of a prefetched operand, of each buffer for prfetching the operand comparing it with the quantity of an prefetched operand of other buffer, and varying a priority order of a request. CONSTITUTION:2 groups of buffers IA, IB for prefetching an operand are provided, and when a buffer idle-state register 8 shown by a prefetching request pointer PRP of each buffer is ''1'' (idle), a memory request signal 10 is sent to a memory, a readout operand is stored in an address shown by the pointer PRP, and contents corresponding to the register 8 are reset to ''0''. An operand in the buffer is read out by an operand readout pointer ORP and is sent to an operating device. The prefetched quantities NA, NB of both A and B systems are obtained by inputting a difference between the operand PRP and ORP to subtracters 4A, 4B, an absolute value of a difference between NA and NB, and a code are derived by a comparing circuit 5, and in case when its difference exceeds a constant value, the priority receiving is allowed to a buffer whose prefetched quantity is less.
JP639181A 1981-01-21 1981-01-21 Data processor Pending JPS57121740A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP639181A JPS57121740A (en) 1981-01-21 1981-01-21 Data processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP639181A JPS57121740A (en) 1981-01-21 1981-01-21 Data processor

Publications (1)

Publication Number Publication Date
JPS57121740A true JPS57121740A (en) 1982-07-29

Family

ID=11637062

Family Applications (1)

Application Number Title Priority Date Filing Date
JP639181A Pending JPS57121740A (en) 1981-01-21 1981-01-21 Data processor

Country Status (1)

Country Link
JP (1) JPS57121740A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04361329A (en) * 1991-06-07 1992-12-14 Fujitsu Ltd Instruction fetch circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04361329A (en) * 1991-06-07 1992-12-14 Fujitsu Ltd Instruction fetch circuit

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