JPS57121733A - Output device - Google Patents

Output device

Info

Publication number
JPS57121733A
JPS57121733A JP644381A JP644381A JPS57121733A JP S57121733 A JPS57121733 A JP S57121733A JP 644381 A JP644381 A JP 644381A JP 644381 A JP644381 A JP 644381A JP S57121733 A JPS57121733 A JP S57121733A
Authority
JP
Japan
Prior art keywords
output
controller
speed
adjusting device
volume
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP644381A
Other languages
Japanese (ja)
Inventor
Hideo Kuo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP644381A priority Critical patent/JPS57121733A/en
Publication of JPS57121733A publication Critical patent/JPS57121733A/en
Pending legal-status Critical Current

Links

Landscapes

  • Digital Computer Display Output (AREA)

Abstract

PURPOSE: To set an output speed optionally, by connecting a speed adjusting device to a controller of an output device.
CONSTITUTION: In case when an electronic computer 1 executes an output to an output device in accordance with an instruction of a program, a start command 2 and an output data 3 are sent to the output device. A controller 4 of the output device which has received these signals sends output data 6 to an actual output medium 5. The controller 4 inputs information of a speed adjusting device 7 after completing the output operation. The speed adjusting device 7 is provided with a volume and consists of an A/D converter for varying the voltage by turning its volume and converting its voltage to a digital value. In accordance with this inputted digital information, the controller 4 enters a holding state for a constant interval of time. The output speed can be varied by adjusting this holding time by the volume of the speed adjusting device 7.
COPYRIGHT: (C)1982,JPO&Japio
JP644381A 1981-01-21 1981-01-21 Output device Pending JPS57121733A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP644381A JPS57121733A (en) 1981-01-21 1981-01-21 Output device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP644381A JPS57121733A (en) 1981-01-21 1981-01-21 Output device

Publications (1)

Publication Number Publication Date
JPS57121733A true JPS57121733A (en) 1982-07-29

Family

ID=11638540

Family Applications (1)

Application Number Title Priority Date Filing Date
JP644381A Pending JPS57121733A (en) 1981-01-21 1981-01-21 Output device

Country Status (1)

Country Link
JP (1) JPS57121733A (en)

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