JPS54158154A - Method and apparatus for analog-digiral conversion - Google Patents

Method and apparatus for analog-digiral conversion

Info

Publication number
JPS54158154A
JPS54158154A JP6705378A JP6705378A JPS54158154A JP S54158154 A JPS54158154 A JP S54158154A JP 6705378 A JP6705378 A JP 6705378A JP 6705378 A JP6705378 A JP 6705378A JP S54158154 A JPS54158154 A JP S54158154A
Authority
JP
Japan
Prior art keywords
signal
duty ratio
analog signal
conversion
wave
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6705378A
Other languages
Japanese (ja)
Inventor
Yutaka Harada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP6705378A priority Critical patent/JPS54158154A/en
Publication of JPS54158154A publication Critical patent/JPS54158154A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To enable the A/D conversion as well as to minimize the number of the input and output lines by using the program-type control unit which can control the duty ratio of the analog signal and then the average value.
CONSTITUTION: Analog signal B is obtained by smoothing rectangular wave A via integrating circuit 14. Accordingly, if the duty ratio of wave A is varied, analog signal B changes in proportion to the duty ratio. Here, a certain data is supposed based on the order of program memory 3, and both addition and subtraction are given to the signal of logic "1" which is delivered to circuit 14 from accumulator 9. As a result, the signal the duty ratio of which is made to correspond to a certain data is obtained. A comparison is given at comparator 12 to the average value between input analog signal 13 and the signal of wave A obtained through circuit 14, and the comparison signal C is increased and decreased repetitively with the value nearest signal 13. Under such conditions, the data judged at program-type control unit 1 i features the result of the A/D conversion, thus completing the A/D convension.
COPYRIGHT: (C)1979,JPO&Japio
JP6705378A 1978-06-02 1978-06-02 Method and apparatus for analog-digiral conversion Pending JPS54158154A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6705378A JPS54158154A (en) 1978-06-02 1978-06-02 Method and apparatus for analog-digiral conversion

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6705378A JPS54158154A (en) 1978-06-02 1978-06-02 Method and apparatus for analog-digiral conversion

Publications (1)

Publication Number Publication Date
JPS54158154A true JPS54158154A (en) 1979-12-13

Family

ID=13333702

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6705378A Pending JPS54158154A (en) 1978-06-02 1978-06-02 Method and apparatus for analog-digiral conversion

Country Status (1)

Country Link
JP (1) JPS54158154A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5689127A (en) * 1979-12-21 1981-07-20 Canon Inc A/d converter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5689127A (en) * 1979-12-21 1981-07-20 Canon Inc A/d converter

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