JPS57120160A - Parity checking system - Google Patents

Parity checking system

Info

Publication number
JPS57120160A
JPS57120160A JP56006079A JP607981A JPS57120160A JP S57120160 A JPS57120160 A JP S57120160A JP 56006079 A JP56006079 A JP 56006079A JP 607981 A JP607981 A JP 607981A JP S57120160 A JPS57120160 A JP S57120160A
Authority
JP
Japan
Prior art keywords
parity
data
bus
circuit
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56006079A
Other languages
Japanese (ja)
Inventor
Kazuo Sumiya
Ryushi Hiroya
Shigeru Takano
Hiroki Masuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56006079A priority Critical patent/JPS57120160A/en
Publication of JPS57120160A publication Critical patent/JPS57120160A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Detection And Correction Of Errors (AREA)

Abstract

PURPOSE:To economize an information process system, by providing only a set of parity checking circuits which is used for information transferred via the common bus to a common bus. CONSTITUTION:A parity check code data d' to which a parity bit P is added by a parity generating circuit PG is transmitted to a common bus BUS. Then the data d' is transmitted to main memory devices MM1' and MM2', an external storage control part FDC plus data receiving circuits RD1-RD4 provided at an input/output control part TPC as well as to a parity checking circuit PC. The circuit PC carries out the parity check to the data d' and delivers the result of check in the form of a parity check output ck. Each device and circuit discriminate the effectiveness or ineffectiveness of the data d' received from the bus BUS by the output ck to start the discrimination of the address and other processes.
JP56006079A 1981-01-19 1981-01-19 Parity checking system Pending JPS57120160A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56006079A JPS57120160A (en) 1981-01-19 1981-01-19 Parity checking system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56006079A JPS57120160A (en) 1981-01-19 1981-01-19 Parity checking system

Publications (1)

Publication Number Publication Date
JPS57120160A true JPS57120160A (en) 1982-07-27

Family

ID=11628551

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56006079A Pending JPS57120160A (en) 1981-01-19 1981-01-19 Parity checking system

Country Status (1)

Country Link
JP (1) JPS57120160A (en)

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