JPS57116418A - Digital-to-analog converting circuit - Google Patents

Digital-to-analog converting circuit

Info

Publication number
JPS57116418A
JPS57116418A JP208981A JP208981A JPS57116418A JP S57116418 A JPS57116418 A JP S57116418A JP 208981 A JP208981 A JP 208981A JP 208981 A JP208981 A JP 208981A JP S57116418 A JPS57116418 A JP S57116418A
Authority
JP
Japan
Prior art keywords
signal
capacitor
logic
output
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP208981A
Other languages
Japanese (ja)
Inventor
Shigeo Kuboki
Kazuo Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP208981A priority Critical patent/JPS57116418A/en
Publication of JPS57116418A publication Critical patent/JPS57116418A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To obtain a high-precision D/A-conversion signal by feeding back the output signal of an output buffer and then discriminating it by comparison with the output signal of a D/A converter, and by charging or discharging a capacitor on the basis of the result of the comparison. CONSTITUTION:The output voltage V0 of an output buffer 13 is compared with the output voltage VDA of a D/A converter 10 by a comparator 11. When its discrimination result shows that V0<VDA, an output signal COUT has logic 1 and a charge-discharge control circuit 14 sets the singnal levels of lines 17 and 19 to 1 and 0 respectively. Consequenctly, analog switches T10 and T11 turn on and a constant-current circuit 12 charges a capacitor C. Then when the signal COUT is inverted to logic 0, the signal level of the line 17 falls to the 0 to stop charging, and the capacitor C holds charge at the charging-stop point in time. When V0>VDA, on the other hand, the signal COUT has the logic 0 and the capacitor C is discharged. When the signal COUT has the logic 0, the discharging is stopped and the voltage of the C at this time is a voltage V0.
JP208981A 1981-01-12 1981-01-12 Digital-to-analog converting circuit Pending JPS57116418A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP208981A JPS57116418A (en) 1981-01-12 1981-01-12 Digital-to-analog converting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP208981A JPS57116418A (en) 1981-01-12 1981-01-12 Digital-to-analog converting circuit

Publications (1)

Publication Number Publication Date
JPS57116418A true JPS57116418A (en) 1982-07-20

Family

ID=11519614

Family Applications (1)

Application Number Title Priority Date Filing Date
JP208981A Pending JPS57116418A (en) 1981-01-12 1981-01-12 Digital-to-analog converting circuit

Country Status (1)

Country Link
JP (1) JPS57116418A (en)

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