JPS57111895A - Storage device having scan-out function - Google Patents

Storage device having scan-out function

Info

Publication number
JPS57111895A
JPS57111895A JP55187795A JP18779580A JPS57111895A JP S57111895 A JPS57111895 A JP S57111895A JP 55187795 A JP55187795 A JP 55187795A JP 18779580 A JP18779580 A JP 18779580A JP S57111895 A JPS57111895 A JP S57111895A
Authority
JP
Japan
Prior art keywords
address
scan
memory
circuit
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55187795A
Other languages
Japanese (ja)
Inventor
Tokuji Furuto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55187795A priority Critical patent/JPS57111895A/en
Publication of JPS57111895A publication Critical patent/JPS57111895A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/066—Means for reducing external access-lines for a semiconductor memory clip, e.g. by multiplexing at least address and data signals

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

PURPOSE:To realize the effective use of the package input/output termnals and at the same time to realize the reading of a scan-out data even during a memory access, by sharing an address signal line. CONSTITUTION:The normal memory access to memory packages A1-A2 is carried out by means of a memory start signal 11, a memory timing signal 12 produced by a memory timing generating circuit 1 plus an address 14 obtained by distributing a memory address 13 through an address register circuit 2 respectively. A scan address switching circuit 3 selects either a scan-in address 15 or a scan-out address 17 by a scan-in/out switch signal 15 supplied from an external device SVP, and transmits the address 15 to the circuit 2.
JP55187795A 1980-12-29 1980-12-29 Storage device having scan-out function Pending JPS57111895A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55187795A JPS57111895A (en) 1980-12-29 1980-12-29 Storage device having scan-out function

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55187795A JPS57111895A (en) 1980-12-29 1980-12-29 Storage device having scan-out function

Publications (1)

Publication Number Publication Date
JPS57111895A true JPS57111895A (en) 1982-07-12

Family

ID=16212353

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55187795A Pending JPS57111895A (en) 1980-12-29 1980-12-29 Storage device having scan-out function

Country Status (1)

Country Link
JP (1) JPS57111895A (en)

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