JPS57111867A - Memory board selecting system - Google Patents

Memory board selecting system

Info

Publication number
JPS57111867A
JPS57111867A JP18823980A JP18823980A JPS57111867A JP S57111867 A JPS57111867 A JP S57111867A JP 18823980 A JP18823980 A JP 18823980A JP 18823980 A JP18823980 A JP 18823980A JP S57111867 A JPS57111867 A JP S57111867A
Authority
JP
Japan
Prior art keywords
board
bits
receives
input
storage device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18823980A
Other languages
Japanese (ja)
Inventor
Masaaki Kobayashi
Tomohito Shibata
Shigeru Hashimoto
Takumi Kishino
Tomoharu Hoshino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP18823980A priority Critical patent/JPS57111867A/en
Publication of JPS57111867A publication Critical patent/JPS57111867A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)

Abstract

PURPOSE:To obtain an economical large-capacity storage device, by properly selecting the board of the storage device using different types of memory boards. CONSTITUTION:For a setting circuit 12 of the sheet number of board A, a switch 12a that receives the ''0'' input is turned on. Thus the ''0'' input is inverted by an inverter 12b to produce ''1'', and board numbers 1-4 are set. A comparator 10 receives upper bits A21 and A20 of an address and then ''0'', i.e., more upper bit to compare input a=0 plus bits A21 and A20 with set number b=S2, S1 and S0 respectively. An adder circuit 14 delivers bits A'19 and A'18 obtained by adding the address bits and the set number. A decoder 18 receives the 2-bit output of a selector 16 to produce the 1st-4th board selection signals +1-+4.
JP18823980A 1980-12-27 1980-12-27 Memory board selecting system Pending JPS57111867A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18823980A JPS57111867A (en) 1980-12-27 1980-12-27 Memory board selecting system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18823980A JPS57111867A (en) 1980-12-27 1980-12-27 Memory board selecting system

Publications (1)

Publication Number Publication Date
JPS57111867A true JPS57111867A (en) 1982-07-12

Family

ID=16220219

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18823980A Pending JPS57111867A (en) 1980-12-27 1980-12-27 Memory board selecting system

Country Status (1)

Country Link
JP (1) JPS57111867A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60229152A (en) * 1984-04-27 1985-11-14 Omron Tateisi Electronics Co Memory device
JPS62235657A (en) * 1986-04-04 1987-10-15 Sharp Corp Address supplying method for ram card
JPH03179544A (en) * 1989-12-08 1991-08-05 Nec Ibaraki Ltd Memory module controller

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60229152A (en) * 1984-04-27 1985-11-14 Omron Tateisi Electronics Co Memory device
JPS62235657A (en) * 1986-04-04 1987-10-15 Sharp Corp Address supplying method for ram card
JPH03179544A (en) * 1989-12-08 1991-08-05 Nec Ibaraki Ltd Memory module controller

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