JPS57108675A - Debugging method - Google Patents
Debugging methodInfo
- Publication number
- JPS57108675A JPS57108675A JP55183718A JP18371880A JPS57108675A JP S57108675 A JPS57108675 A JP S57108675A JP 55183718 A JP55183718 A JP 55183718A JP 18371880 A JP18371880 A JP 18371880A JP S57108675 A JPS57108675 A JP S57108675A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- oscillator
- module plate
- provided outside
- clock signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
PURPOSE:To obtain a universal debugging device with a simple hardware by passing clock signals from an oscillator in a circuit module plate to a circuit device provided outside. CONSTITUTION:A circuit module plate 11 to be debugged contains a logic circuit 12 and an oscillator 13. Output clock signals of the oscillator 13 is passed through a gate circuit 14 manually operable provided outside to make a desired clock signal and then, returned to the inside again to serve as a debugging clock signal. This enables the execution of various debuggings without change of hardware in the module plate 11.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55183718A JPS57108675A (en) | 1980-12-26 | 1980-12-26 | Debugging method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55183718A JPS57108675A (en) | 1980-12-26 | 1980-12-26 | Debugging method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57108675A true JPS57108675A (en) | 1982-07-06 |
Family
ID=16140736
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55183718A Pending JPS57108675A (en) | 1980-12-26 | 1980-12-26 | Debugging method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57108675A (en) |
-
1980
- 1980-12-26 JP JP55183718A patent/JPS57108675A/en active Pending
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