JPS5730981A - Method and device for time up time measurement and execution of the same - Google Patents

Method and device for time up time measurement and execution of the same

Info

Publication number
JPS5730981A
JPS5730981A JP10638480A JP10638480A JPS5730981A JP S5730981 A JPS5730981 A JP S5730981A JP 10638480 A JP10638480 A JP 10638480A JP 10638480 A JP10638480 A JP 10638480A JP S5730981 A JPS5730981 A JP S5730981A
Authority
JP
Japan
Prior art keywords
time
output signal
counter
flip
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10638480A
Other languages
Japanese (ja)
Inventor
Satoru Kinoshita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ORIGINAL DENKI KK
ORIJINARU DENKI KK
Original Assignee
ORIGINAL DENKI KK
ORIJINARU DENKI KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ORIGINAL DENKI KK, ORIJINARU DENKI KK filed Critical ORIGINAL DENKI KK
Priority to JP10638480A priority Critical patent/JPS5730981A/en
Publication of JPS5730981A publication Critical patent/JPS5730981A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G04—HOROLOGY
    • G04F—TIME-INTERVAL MEASURING
    • G04F10/00—Apparatus for measuring unknown time intervals by electric means

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measurement Of Unknown Time Intervals (AREA)

Abstract

PURPOSE:To make it possible to indicate directly time-up time of a timer, by making a frequency of a reference generator coincide with the counted number of a counter. CONSTITUTION:The output of a crystal oscillator 1 is applied to an AND gate 2. Further, a flip-flop circuit 3 to which an output signal is applied from an output terminal (a) of a generator of a timer is provided. Still more, the output signal from the flip-flop circuit 3 is also applied to the AND gate 2, and the output signal from the AND gate is applied to a counter 4. The output signal from the counter 4 is applied to a latch circuit 5, and the output signal from the latch circuit 5 is applied to an indication means 6. In addition, a controlling circuit 7 is connected with the flip-flop 3, the counter 4, and the latch circuit 5.
JP10638480A 1980-08-04 1980-08-04 Method and device for time up time measurement and execution of the same Pending JPS5730981A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10638480A JPS5730981A (en) 1980-08-04 1980-08-04 Method and device for time up time measurement and execution of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10638480A JPS5730981A (en) 1980-08-04 1980-08-04 Method and device for time up time measurement and execution of the same

Publications (1)

Publication Number Publication Date
JPS5730981A true JPS5730981A (en) 1982-02-19

Family

ID=14432202

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10638480A Pending JPS5730981A (en) 1980-08-04 1980-08-04 Method and device for time up time measurement and execution of the same

Country Status (1)

Country Link
JP (1) JPS5730981A (en)

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