JPS57101908A - Input/output bus monitoring system of sequence - Google Patents

Input/output bus monitoring system of sequence

Info

Publication number
JPS57101908A
JPS57101908A JP55177253A JP17725380A JPS57101908A JP S57101908 A JPS57101908 A JP S57101908A JP 55177253 A JP55177253 A JP 55177253A JP 17725380 A JP17725380 A JP 17725380A JP S57101908 A JPS57101908 A JP S57101908A
Authority
JP
Japan
Prior art keywords
input
reference value
case
sequence
output bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55177253A
Other languages
Japanese (ja)
Inventor
Hironobu Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP55177253A priority Critical patent/JPS57101908A/en
Publication of JPS57101908A publication Critical patent/JPS57101908A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1608—Error detection by comparing the output signals of redundant hardware

Abstract

PURPOSE:To raise the reliability of an input/output part, by comparing an inputted external reference value with a reference value stored in an internal memory, and deciding an input bus to be abnormal, in case of dissidence as a result. CONSTITUTION:In order to monitor an abnormal state of an input/output bus 1 of a device, a reference value is set to the outside. Also, the reference value is set to a core memory in advance. Subsequently, the external reference value inputted by a sequencer is compared with the internal reference value. As a result, in case of coincidence of both of them, the input part is decided to be normal, and in case of dissidence, the input bus is decided to be abnormal. In this way, the reliability of the input/output part is raised.
JP55177253A 1980-12-17 1980-12-17 Input/output bus monitoring system of sequence Pending JPS57101908A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55177253A JPS57101908A (en) 1980-12-17 1980-12-17 Input/output bus monitoring system of sequence

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55177253A JPS57101908A (en) 1980-12-17 1980-12-17 Input/output bus monitoring system of sequence

Publications (1)

Publication Number Publication Date
JPS57101908A true JPS57101908A (en) 1982-06-24

Family

ID=16027835

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55177253A Pending JPS57101908A (en) 1980-12-17 1980-12-17 Input/output bus monitoring system of sequence

Country Status (1)

Country Link
JP (1) JPS57101908A (en)

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