JPS57100373A - Program timer - Google Patents

Program timer

Info

Publication number
JPS57100373A
JPS57100373A JP17739380A JP17739380A JPS57100373A JP S57100373 A JPS57100373 A JP S57100373A JP 17739380 A JP17739380 A JP 17739380A JP 17739380 A JP17739380 A JP 17739380A JP S57100373 A JPS57100373 A JP S57100373A
Authority
JP
Japan
Prior art keywords
day
flop
flip
timer
week
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17739380A
Other languages
Japanese (ja)
Inventor
Toshiyuki Masuda
Katsunori Kitagawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP17739380A priority Critical patent/JPS57100373A/en
Publication of JPS57100373A publication Critical patent/JPS57100373A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G04—HOROLOGY
    • G04G—ELECTRONIC TIME-PIECES
    • G04G13/00—Producing acoustic time signals
    • G04G13/02—Producing acoustic time signals at preselected times, e.g. alarm clocks
    • G04G13/026—Producing acoustic time signals at preselected times, e.g. alarm clocks acting at a number of different times

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Electric Clocks (AREA)

Abstract

PURPOSE:To obtain a timer output automatically in accordance with the days of the week by obtaining the timer output only at the preset day by means of a day selecting switch. CONSTITUTION:A data change pulse PD is applied from a clock circuit 1 to a 7-adic counter 22 which outputs the day of the week signals corresponding to the respective days of the week. If any of day select switches 24a-24g of the day when a timer is desired to be operated is turned on, the day sigal is applied on that day to the enable terminal E of an RS flip-flop FF via said switches 24a-24g, and the RS flip-flop FF is set by the timer output Ta inputted to the set terminal S of the RS flip-flop FF. The output Q of this RS flip- flop FF is a timer output. THe RS flip-flop FF is reset every day by the data change pulse PD'.
JP17739380A 1980-12-15 1980-12-15 Program timer Pending JPS57100373A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17739380A JPS57100373A (en) 1980-12-15 1980-12-15 Program timer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17739380A JPS57100373A (en) 1980-12-15 1980-12-15 Program timer

Publications (1)

Publication Number Publication Date
JPS57100373A true JPS57100373A (en) 1982-06-22

Family

ID=16030143

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17739380A Pending JPS57100373A (en) 1980-12-15 1980-12-15 Program timer

Country Status (1)

Country Link
JP (1) JPS57100373A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54155382A (en) * 1978-05-30 1979-12-07 Rhythm Watch Co Program timer

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54155382A (en) * 1978-05-30 1979-12-07 Rhythm Watch Co Program timer

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