JPS5698027A - Digital level compressor - Google Patents
Digital level compressorInfo
- Publication number
- JPS5698027A JPS5698027A JP17404879A JP17404879A JPS5698027A JP S5698027 A JPS5698027 A JP S5698027A JP 17404879 A JP17404879 A JP 17404879A JP 17404879 A JP17404879 A JP 17404879A JP S5698027 A JPS5698027 A JP S5698027A
- Authority
- JP
- Japan
- Prior art keywords
- bits
- rank
- data
- bit
- register
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B14/00—Transmission systems not characterised by the medium used for transmission
- H04B14/02—Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation
- H04B14/04—Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation using pulse code modulation
- H04B14/046—Systems or methods for reducing noise or bandwidth
- H04B14/048—Non linear compression or expansion
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
- Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
Abstract
PURPOSE:To avoid the digital clipping which is caused by an increment of the bits to be added, by extracting the several higher-rank bits excepting the bits corresponding to the sample data out of the lowest-rank bit among the addition outputs of the binary parallel sample data. CONSTITUTION:In case a carry exists in the 4-bit adder 1, the parallel sampling data is loaded into the shift register 2. The contents of the register 2 is turned by the data heading control turning clock pulse supplied from the clock pulse generating circuit 7 and then shifted so that the carry pulse is used for the highest-rank bit of an array. Then the contents of the register 2 is written into the shift register 3 or 4 and then read out by the clock frequency lower than the writing clock pulse. Then the higher-rank parallel 4 bits excepting the carry pulse are extracted as the serial 4-bit data among the addition outputs of the two input data of 4 bits.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17404879A JPS5698027A (en) | 1979-12-29 | 1979-12-29 | Digital level compressor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17404879A JPS5698027A (en) | 1979-12-29 | 1979-12-29 | Digital level compressor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5698027A true JPS5698027A (en) | 1981-08-07 |
Family
ID=15971704
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17404879A Pending JPS5698027A (en) | 1979-12-29 | 1979-12-29 | Digital level compressor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5698027A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63122057A (en) * | 1986-11-12 | 1988-05-26 | Hitachi Ltd | Recording and reproducing device for digital information |
-
1979
- 1979-12-29 JP JP17404879A patent/JPS5698027A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63122057A (en) * | 1986-11-12 | 1988-05-26 | Hitachi Ltd | Recording and reproducing device for digital information |
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