JPS5694833A - A/d converter - Google Patents
A/d converterInfo
- Publication number
- JPS5694833A JPS5694833A JP17046879A JP17046879A JPS5694833A JP S5694833 A JPS5694833 A JP S5694833A JP 17046879 A JP17046879 A JP 17046879A JP 17046879 A JP17046879 A JP 17046879A JP S5694833 A JPS5694833 A JP S5694833A
- Authority
- JP
- Japan
- Prior art keywords
- main
- clock pulse
- frequency
- generator
- secondary clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/20—Increasing resolution using an n bit system to obtain n + m bits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/50—Analogue/digital converters with intermediate conversion to time interval
- H03M1/504—Analogue/digital converters with intermediate conversion to time interval using pulse width modulation
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
PURPOSE:To realize not only a high speed but a high accuracy for an A/D converter, by combining the main and secondary clock pulses. CONSTITUTION:The main clock pulse given from the main clock generator 4 and having the repetitive frequency fM is applied to the wave crest-time converting circuit 1 to give a synchronous control to the rise of the square wave of the conversion output. Thus the units of the main clock pulses are counted in the form of the rough value of the time duration. On the other hand, the secondary clock generator 5 produces the clock pulse having a relation of [N/(N-1)].fM to the frequency fM to the frequency fM of the main clock pulse. The generator 5 is driven to start the generation of the secondary clock pulse synchronizing with the end of the square wave signal of the circuit 1, i.e., synchronizing with the discontinuation of counting of the main counter 3. The secondary clock pulse is compared with the main clockpulse through the phase comparator 6, the the secondary clock pulses are counted until a coincidence is obtained in the above comparison. As a result, a counting is possible with an accuracy of N times as high as that of only main clock pulse.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17046879A JPS5694833A (en) | 1979-12-28 | 1979-12-28 | A/d converter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17046879A JPS5694833A (en) | 1979-12-28 | 1979-12-28 | A/d converter |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5694833A true JPS5694833A (en) | 1981-07-31 |
Family
ID=15905492
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17046879A Pending JPS5694833A (en) | 1979-12-28 | 1979-12-28 | A/d converter |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5694833A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6180326U (en) * | 1984-10-31 | 1986-05-28 | ||
JPS63286025A (en) * | 1987-05-19 | 1988-11-22 | Oki Electric Ind Co Ltd | Integration type a/d converter |
-
1979
- 1979-12-28 JP JP17046879A patent/JPS5694833A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6180326U (en) * | 1984-10-31 | 1986-05-28 | ||
JPS63286025A (en) * | 1987-05-19 | 1988-11-22 | Oki Electric Ind Co Ltd | Integration type a/d converter |
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