JPS5753153A - Pulse frequency converter - Google Patents

Pulse frequency converter

Info

Publication number
JPS5753153A
JPS5753153A JP12898980A JP12898980A JPS5753153A JP S5753153 A JPS5753153 A JP S5753153A JP 12898980 A JP12898980 A JP 12898980A JP 12898980 A JP12898980 A JP 12898980A JP S5753153 A JPS5753153 A JP S5753153A
Authority
JP
Japan
Prior art keywords
output
gate
flip flop
frequency converter
counter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12898980A
Other languages
Japanese (ja)
Inventor
Kazumitsu Miyakoshi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP12898980A priority Critical patent/JPS5753153A/en
Publication of JPS5753153A publication Critical patent/JPS5753153A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/64—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two
    • H03K23/66—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses

Landscapes

  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE:To improve the precision without increasing the number of stages of a counter, by supplying pulses to the counter through an EX-OR gate. CONSTITUTION:The output of a pulse generator 8 is supplied to binary counters 3-7 through an EX-OR gate 9. When an output (g) of the EX-OR gate 9 and outputs (h)-(l) of counters coincide with outputs (a)-(f) of a counter buffer 1, a flip flop 11 is set by the output of a coincidence signal generator 2. Binary counters are reset by the Q output of the flip flop, 11 and a pulse output is taken out through an inverter 12. The output of the inverter 12 is supplied to the EX-OR gate 9 also through an AND gate 10 to reset the flip flop 11.
JP12898980A 1980-09-16 1980-09-16 Pulse frequency converter Pending JPS5753153A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12898980A JPS5753153A (en) 1980-09-16 1980-09-16 Pulse frequency converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12898980A JPS5753153A (en) 1980-09-16 1980-09-16 Pulse frequency converter

Publications (1)

Publication Number Publication Date
JPS5753153A true JPS5753153A (en) 1982-03-30

Family

ID=14998364

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12898980A Pending JPS5753153A (en) 1980-09-16 1980-09-16 Pulse frequency converter

Country Status (1)

Country Link
JP (1) JPS5753153A (en)

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