JPS5694830A - Analog-digital converter - Google Patents

Analog-digital converter

Info

Publication number
JPS5694830A
JPS5694830A JP17165479A JP17165479A JPS5694830A JP S5694830 A JPS5694830 A JP S5694830A JP 17165479 A JP17165479 A JP 17165479A JP 17165479 A JP17165479 A JP 17165479A JP S5694830 A JPS5694830 A JP S5694830A
Authority
JP
Japan
Prior art keywords
groups
group
output
differential amplifier
input terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17165479A
Other languages
Japanese (ja)
Inventor
Kenichi Torii
Shoichi Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP17165479A priority Critical patent/JPS5694830A/en
Publication of JPS5694830A publication Critical patent/JPS5694830A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • H03M1/145—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit the steps being performed sequentially in series-connected stages
    • H03M1/146—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit the steps being performed sequentially in series-connected stages all stages being simultaneous converters
    • H03M1/147—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit the steps being performed sequentially in series-connected stages all stages being simultaneous converters at least two of which share a common reference generator
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/34—Analogue value compared with reference values
    • H03M1/36—Analogue value compared with reference values simultaneously only, i.e. parallel type
    • H03M1/361—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type
    • H03M1/362—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type the reference values being generated by a resistive voltage divider
    • H03M1/365—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type the reference values being generated by a resistive voltage divider the voltage divider being a single resistor string

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To increase the speed of conversion, by combining the differential amplifier group and the analog switch group. CONSTITUTION:The input analog voltage Vx to be led to the input terminal 11 is sample-held by the sample holding circuit 12 and then applied to one input terminal of the differential amplifier groups 131-134 each. The different the 1st reference voltage is applied to the other input terminal of the differential amplifier groups. The amplifier groups have the output terminal Q' and the noninverse output terminal Q, and the noninverse output Q is applied to the decider groups 16-1-16-4. The output of the decider group 16 is put properly into the AND gate groups 17-1- 17-4. The AND gate group 17 controls the analog switch groups 18-1-18-4 so that only the minimum output voltage is selected among the output voltages of the amplifier groups 13-1-13-4. The differential amplifier group can follow enough a high- speed change of Vx since the outputs Q' and Q are connected alternately to the analog switch groups in the order of the level of the 1st reference voltage which is applied to the other input terminal of the differential amplifier group.
JP17165479A 1979-12-27 1979-12-27 Analog-digital converter Pending JPS5694830A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17165479A JPS5694830A (en) 1979-12-27 1979-12-27 Analog-digital converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17165479A JPS5694830A (en) 1979-12-27 1979-12-27 Analog-digital converter

Publications (1)

Publication Number Publication Date
JPS5694830A true JPS5694830A (en) 1981-07-31

Family

ID=15927211

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17165479A Pending JPS5694830A (en) 1979-12-27 1979-12-27 Analog-digital converter

Country Status (1)

Country Link
JP (1) JPS5694830A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5884534A (en) * 1981-11-16 1983-05-20 Sony Corp Analog-to-digital converter
JPS58107719A (en) * 1981-12-22 1983-06-27 Sony Corp Analog-to-digital converter

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5884534A (en) * 1981-11-16 1983-05-20 Sony Corp Analog-to-digital converter
JPH0311131B2 (en) * 1981-11-16 1991-02-15 Sony Corp
JPS58107719A (en) * 1981-12-22 1983-06-27 Sony Corp Analog-to-digital converter
JPH0311132B2 (en) * 1981-12-22 1991-02-15 Sony Corp

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