JPS5691562A - Fault control system for signal reception interruption - Google Patents

Fault control system for signal reception interruption

Info

Publication number
JPS5691562A
JPS5691562A JP16888779A JP16888779A JPS5691562A JP S5691562 A JPS5691562 A JP S5691562A JP 16888779 A JP16888779 A JP 16888779A JP 16888779 A JP16888779 A JP 16888779A JP S5691562 A JPS5691562 A JP S5691562A
Authority
JP
Japan
Prior art keywords
signal
interruption
held
level
buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16888779A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6324338B2 (enExample
Inventor
Takashi Oya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP16888779A priority Critical patent/JPS5691562A/ja
Publication of JPS5691562A publication Critical patent/JPS5691562A/ja
Publication of JPS6324338B2 publication Critical patent/JPS6324338B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer And Data Communications (AREA)
  • Small-Scale Networks (AREA)
  • Communication Control (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)
JP16888779A 1979-12-25 1979-12-25 Fault control system for signal reception interruption Granted JPS5691562A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16888779A JPS5691562A (en) 1979-12-25 1979-12-25 Fault control system for signal reception interruption

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16888779A JPS5691562A (en) 1979-12-25 1979-12-25 Fault control system for signal reception interruption

Publications (2)

Publication Number Publication Date
JPS5691562A true JPS5691562A (en) 1981-07-24
JPS6324338B2 JPS6324338B2 (enExample) 1988-05-20

Family

ID=15876400

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16888779A Granted JPS5691562A (en) 1979-12-25 1979-12-25 Fault control system for signal reception interruption

Country Status (1)

Country Link
JP (1) JPS5691562A (enExample)

Also Published As

Publication number Publication date
JPS6324338B2 (enExample) 1988-05-20

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