JPS5688335A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5688335A JPS5688335A JP16600179A JP16600179A JPS5688335A JP S5688335 A JPS5688335 A JP S5688335A JP 16600179 A JP16600179 A JP 16600179A JP 16600179 A JP16600179 A JP 16600179A JP S5688335 A JPS5688335 A JP S5688335A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- layer
- type
- layers
- junction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
- H01L21/743—Making of internal connections, substrate contacts
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Bipolar Transistors (AREA)
- Element Separation (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To apply a bias potential from a main surface of a substrate to the substrate without newly adding a diffusing step in an N<-> type epitaxial dielectric isolating structure. CONSTITUTION:An N<-> type epitaxial layer on a P type Si substrate 1 having N<+> type buried layers 61, 21, 23 is insulated and isolated laterally into a plurality of layers 51-54, an N<+> type layer 64 in an island 62 is formed simultaneously with N<+> type layers 24, 34 in other islands, and a metallic electrode 10 is attached thereto. The layer 61 and the junction surface 610 of the substrate 1 are partly broken down irreversibly. When positive voltage is applied to the electrode 10 and negative voltage is applied to the substrate 11 in this state, nonrectification conduction can be secured through the junction surface 610. Accordingly, bias voltage can be applied from the main surface 200 side to the substrate. The layer 61 can be omitted, but high voltage becomes necessary to break down the junction between the layer 62 and the substrate 1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16600179A JPS586308B2 (en) | 1979-12-19 | 1979-12-19 | semiconductor equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16600179A JPS586308B2 (en) | 1979-12-19 | 1979-12-19 | semiconductor equipment |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5688335A true JPS5688335A (en) | 1981-07-17 |
JPS586308B2 JPS586308B2 (en) | 1983-02-03 |
Family
ID=15823029
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16600179A Expired JPS586308B2 (en) | 1979-12-19 | 1979-12-19 | semiconductor equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS586308B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6323335A (en) * | 1985-09-25 | 1988-01-30 | モノリシツク メモリ−ズ,インコ−ポレイテツド | Isolation and substrate connection for bipolar integrated circuit |
-
1979
- 1979-12-19 JP JP16600179A patent/JPS586308B2/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6323335A (en) * | 1985-09-25 | 1988-01-30 | モノリシツク メモリ−ズ,インコ−ポレイテツド | Isolation and substrate connection for bipolar integrated circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS586308B2 (en) | 1983-02-03 |
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