JPS5687299A - Memory device control system - Google Patents
Memory device control systemInfo
- Publication number
- JPS5687299A JPS5687299A JP16153679A JP16153679A JPS5687299A JP S5687299 A JPS5687299 A JP S5687299A JP 16153679 A JP16153679 A JP 16153679A JP 16153679 A JP16153679 A JP 16153679A JP S5687299 A JPS5687299 A JP S5687299A
- Authority
- JP
- Japan
- Prior art keywords
- error
- bit
- address
- registers
- exchange
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
PURPOSE: To realize an exchange of error bits without any man power, by setting automatically both an error address and error bit information via an ECC function.
CONSTITUTION: The read data supplied from the main memory 1 is checked at the ECC check circuit 8, and an error if any is corrected through the circuit 8. At the same time, the error code and address are held in the registers 13 and 12 each. The contents of the registers 13 and 12 are extracted by the error process routine 18 after end of the instruction process. The values of the registers 12 and 13 are set to the error address array 3 in case the bit error of the main memory 1 is permanent, and then written into the memory 1 for exchange of error bits. The error code part of the array 3 is extracted to the register 4 to be decoded. Then the bit corresponding to the error bits is exchanged with the exchange bit through the bit switching circuit 11 and then written into the error address of the memory 1.
COPYRIGHT: (C)1981,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16153679A JPS5687299A (en) | 1979-12-14 | 1979-12-14 | Memory device control system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16153679A JPS5687299A (en) | 1979-12-14 | 1979-12-14 | Memory device control system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5687299A true JPS5687299A (en) | 1981-07-15 |
Family
ID=15736957
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16153679A Pending JPS5687299A (en) | 1979-12-14 | 1979-12-14 | Memory device control system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5687299A (en) |
-
1979
- 1979-12-14 JP JP16153679A patent/JPS5687299A/en active Pending
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