JPS5682958A - Address conversion system - Google Patents

Address conversion system

Info

Publication number
JPS5682958A
JPS5682958A JP15948479A JP15948479A JPS5682958A JP S5682958 A JPS5682958 A JP S5682958A JP 15948479 A JP15948479 A JP 15948479A JP 15948479 A JP15948479 A JP 15948479A JP S5682958 A JPS5682958 A JP S5682958A
Authority
JP
Japan
Prior art keywords
external
address conversion
address
modification
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15948479A
Other languages
Japanese (ja)
Other versions
JPS6336542B2 (en
Inventor
Tsuneo Kinoshita
Fumitaka Sato
Isamu Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP15948479A priority Critical patent/JPS5682958A/en
Publication of JPS5682958A publication Critical patent/JPS5682958A/en
Publication of JPS6336542B2 publication Critical patent/JPS6336542B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Bus Control (AREA)
  • Microcomputers (AREA)
  • Memory System (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Advance Control (AREA)

Abstract

PURPOSE: To perform address conversion by either base modification or page modification, by performing external memory extension logic operation while logic functions inside of an arithmetic controller made into one chip are left fixed.
CONSTITUTION: Arithmetic controller 101 is made into one chip of a very large scale integrated semiconductor. This controller 101 is controlled by external control memory part 102, and sends logical addresses and segment information to an external circuit via main bus 103 with internal logic functions fixed. On the other hand, address converting mechanism 105 for extending the address space of the main memory receives said logical addresses, segment information, etc., sent from device 101 and refers to conversion table 105T to obtain physical addresses of the man memory. This mechanism 105 varies in function constitution with two kinds of external setting signals for assigning address conversion systems included in an external signal group. Namely, the address conversion by base modification or page modification can be selected.
COPYRIGHT: (C)1981,JPO&Japio
JP15948479A 1979-12-08 1979-12-08 Address conversion system Granted JPS5682958A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15948479A JPS5682958A (en) 1979-12-08 1979-12-08 Address conversion system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15948479A JPS5682958A (en) 1979-12-08 1979-12-08 Address conversion system

Publications (2)

Publication Number Publication Date
JPS5682958A true JPS5682958A (en) 1981-07-07
JPS6336542B2 JPS6336542B2 (en) 1988-07-20

Family

ID=15694771

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15948479A Granted JPS5682958A (en) 1979-12-08 1979-12-08 Address conversion system

Country Status (1)

Country Link
JP (1) JPS5682958A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5864525A (en) * 1992-08-20 1999-01-26 Mitsubishi Denki Kabushiki Kaisha Optical disk device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5093739A (en) * 1973-12-20 1975-07-26
JPS513741A (en) * 1974-06-26 1976-01-13 Ibm
JPS516625A (en) * 1974-07-08 1976-01-20 Hitachi Ltd DEETATENSOSOCHI
JPS5414635A (en) * 1977-07-06 1979-02-03 Hitachi Ltd Memory extension system for computer

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5093739A (en) * 1973-12-20 1975-07-26
JPS513741A (en) * 1974-06-26 1976-01-13 Ibm
JPS516625A (en) * 1974-07-08 1976-01-20 Hitachi Ltd DEETATENSOSOCHI
JPS5414635A (en) * 1977-07-06 1979-02-03 Hitachi Ltd Memory extension system for computer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5864525A (en) * 1992-08-20 1999-01-26 Mitsubishi Denki Kabushiki Kaisha Optical disk device

Also Published As

Publication number Publication date
JPS6336542B2 (en) 1988-07-20

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