JPS5680871A - Buffer memory control system - Google Patents
Buffer memory control systemInfo
- Publication number
- JPS5680871A JPS5680871A JP15841579A JP15841579A JPS5680871A JP S5680871 A JPS5680871 A JP S5680871A JP 15841579 A JP15841579 A JP 15841579A JP 15841579 A JP15841579 A JP 15841579A JP S5680871 A JPS5680871 A JP S5680871A
- Authority
- JP
- Japan
- Prior art keywords
- address
- access
- register
- word address
- memory block
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Memory System Of A Hierarchy Structure (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15841579A JPS5680871A (en) | 1979-12-06 | 1979-12-06 | Buffer memory control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15841579A JPS5680871A (en) | 1979-12-06 | 1979-12-06 | Buffer memory control system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5680871A true JPS5680871A (en) | 1981-07-02 |
Family
ID=15671249
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15841579A Pending JPS5680871A (en) | 1979-12-06 | 1979-12-06 | Buffer memory control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5680871A (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5819785A (ja) * | 1981-07-30 | 1983-02-04 | Fujitsu Ltd | メモリアクセス制御方式 |
KR100387719B1 (ko) * | 2000-12-29 | 2003-06-18 | 주식회사 하이닉스반도체 | 반도체 메모리 장치 및 그의 메모리 셀 블록 활성화 제어방법 |
-
1979
- 1979-12-06 JP JP15841579A patent/JPS5680871A/ja active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5819785A (ja) * | 1981-07-30 | 1983-02-04 | Fujitsu Ltd | メモリアクセス制御方式 |
JPH0250498B2 (ja) * | 1981-07-30 | 1990-11-02 | Fujitsu Ltd | |
KR100387719B1 (ko) * | 2000-12-29 | 2003-06-18 | 주식회사 하이닉스반도체 | 반도체 메모리 장치 및 그의 메모리 셀 블록 활성화 제어방법 |
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