JPS5680759A - Control system for plural central processors - Google Patents

Control system for plural central processors

Info

Publication number
JPS5680759A
JPS5680759A JP15835179A JP15835179A JPS5680759A JP S5680759 A JPS5680759 A JP S5680759A JP 15835179 A JP15835179 A JP 15835179A JP 15835179 A JP15835179 A JP 15835179A JP S5680759 A JPS5680759 A JP S5680759A
Authority
JP
Japan
Prior art keywords
speed
low
clock
cpu14
cpu12
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15835179A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6255186B2 (enrdf_load_html_response
Inventor
Hirohiko Kawai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Priority to JP15835179A priority Critical patent/JPS5680759A/ja
Publication of JPS5680759A publication Critical patent/JPS5680759A/ja
Publication of JPS6255186B2 publication Critical patent/JPS6255186B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Multi Processors (AREA)
JP15835179A 1979-12-06 1979-12-06 Control system for plural central processors Granted JPS5680759A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15835179A JPS5680759A (en) 1979-12-06 1979-12-06 Control system for plural central processors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15835179A JPS5680759A (en) 1979-12-06 1979-12-06 Control system for plural central processors

Publications (2)

Publication Number Publication Date
JPS5680759A true JPS5680759A (en) 1981-07-02
JPS6255186B2 JPS6255186B2 (enrdf_load_html_response) 1987-11-18

Family

ID=15669745

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15835179A Granted JPS5680759A (en) 1979-12-06 1979-12-06 Control system for plural central processors

Country Status (1)

Country Link
JP (1) JPS5680759A (enrdf_load_html_response)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56140459A (en) * 1980-04-04 1981-11-02 Hitachi Ltd Data processing system
JPH01228006A (ja) * 1988-03-08 1989-09-12 Fujitsu Ltd マイクロコンピュータシステムのクロック信号供給装置
JPH02135564A (ja) * 1988-11-16 1990-05-24 Sony Corp データ処理装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50114950A (enrdf_load_html_response) * 1974-02-18 1975-09-09

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50114950A (enrdf_load_html_response) * 1974-02-18 1975-09-09

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56140459A (en) * 1980-04-04 1981-11-02 Hitachi Ltd Data processing system
JPH01228006A (ja) * 1988-03-08 1989-09-12 Fujitsu Ltd マイクロコンピュータシステムのクロック信号供給装置
JPH02135564A (ja) * 1988-11-16 1990-05-24 Sony Corp データ処理装置

Also Published As

Publication number Publication date
JPS6255186B2 (enrdf_load_html_response) 1987-11-18

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