JPS5676859A - Memory device - Google Patents

Memory device

Info

Publication number
JPS5676859A
JPS5676859A JP15336379A JP15336379A JPS5676859A JP S5676859 A JPS5676859 A JP S5676859A JP 15336379 A JP15336379 A JP 15336379A JP 15336379 A JP15336379 A JP 15336379A JP S5676859 A JPS5676859 A JP S5676859A
Authority
JP
Japan
Prior art keywords
memory device
unit
addresses
serial numbers
increase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15336379A
Other languages
Japanese (ja)
Inventor
Hidehiko Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP15336379A priority Critical patent/JPS5676859A/en
Publication of JPS5676859A publication Critical patent/JPS5676859A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To increase the range of application regardless of the defect detected at a part of the memory device by reducing the increase unit of the memory device and, by giving the serial numbers within the new units increased by using an address converting circuit.
CONSTITUTION: In case the four addresses are added to the memory device which performs the 4-way interleaving, the addresses of the writing words receive the serial numbers within the new unit D which is increased to the bank 1. In other words, the addresses are stored enblock and with the serial numbers into the bank 1 via the address converting circuit 25. In such way of address conversion, the increase unit of the memory part can be coincided with the minimum unit of the hardware constitution. As a result, the increase unit can be reduced for the memory device, and thus the range of application can be increased even in case some defect exist at a part of the memory device.
COPYRIGHT: (C)1981,JPO&Japio
JP15336379A 1979-11-26 1979-11-26 Memory device Pending JPS5676859A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15336379A JPS5676859A (en) 1979-11-26 1979-11-26 Memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15336379A JPS5676859A (en) 1979-11-26 1979-11-26 Memory device

Publications (1)

Publication Number Publication Date
JPS5676859A true JPS5676859A (en) 1981-06-24

Family

ID=15560810

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15336379A Pending JPS5676859A (en) 1979-11-26 1979-11-26 Memory device

Country Status (1)

Country Link
JP (1) JPS5676859A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6149249A (en) * 1984-08-17 1986-03-11 Fujitsu Ltd Interleave control system of memory device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49103539A (en) * 1973-01-03 1974-10-01
JPS5268331A (en) * 1975-12-05 1977-06-07 Hitachi Ltd Interleaving control system of shared memory

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49103539A (en) * 1973-01-03 1974-10-01
JPS5268331A (en) * 1975-12-05 1977-06-07 Hitachi Ltd Interleaving control system of shared memory

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6149249A (en) * 1984-08-17 1986-03-11 Fujitsu Ltd Interleave control system of memory device

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