JPS5674938A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5674938A
JPS5674938A JP15172479A JP15172479A JPS5674938A JP S5674938 A JPS5674938 A JP S5674938A JP 15172479 A JP15172479 A JP 15172479A JP 15172479 A JP15172479 A JP 15172479A JP S5674938 A JPS5674938 A JP S5674938A
Authority
JP
Japan
Prior art keywords
layer
island area
area
constitution
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15172479A
Other languages
Japanese (ja)
Inventor
Yoshitaka Tawara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Electronic Corp filed Critical Pioneer Electronic Corp
Priority to JP15172479A priority Critical patent/JPS5674938A/en
Publication of JPS5674938A publication Critical patent/JPS5674938A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To increase an inverse withstand voltage against a separate voltage by a method wherein within an separated island area, the same conduction type embedded layer as the type of an island area is installed. CONSTITUTION:On a P type substrate 1, an N epitaxial layer 2 is laid, an N<+> layer 7 is installed and the N<+> layer 2 is laid thereupon. Separated by a P layers 3a, 3b, an island area 2a is formed. In this area, a collector 4, a base 5 and an emitter 6 are formed. With this constitution, the embedded layer 7 and the substrate 1 do not dorm a P-N junction plane, as a result, even if a radius of curvature of the peripheral part of the embedded layer is small, an inverse withstand voltage is not lowered.
JP15172479A 1979-11-22 1979-11-22 Semiconductor device Pending JPS5674938A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15172479A JPS5674938A (en) 1979-11-22 1979-11-22 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15172479A JPS5674938A (en) 1979-11-22 1979-11-22 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5674938A true JPS5674938A (en) 1981-06-20

Family

ID=15524891

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15172479A Pending JPS5674938A (en) 1979-11-22 1979-11-22 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5674938A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61180482A (en) * 1984-11-28 1986-08-13 フエアチアイルド カメラ アンド インストルメント コ−ポレ−シヨン L-high speed manufacturing method for fast bipolar analog large integrated circuit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4840838A (en) * 1971-09-27 1973-06-15
JPS4934781A (en) * 1972-08-01 1974-03-30
JPS5379472A (en) * 1976-12-24 1978-07-13 Fuji Electric Co Ltd Manufacture of bipolar type ic

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4840838A (en) * 1971-09-27 1973-06-15
JPS4934781A (en) * 1972-08-01 1974-03-30
JPS5379472A (en) * 1976-12-24 1978-07-13 Fuji Electric Co Ltd Manufacture of bipolar type ic

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61180482A (en) * 1984-11-28 1986-08-13 フエアチアイルド カメラ アンド インストルメント コ−ポレ−シヨン L-high speed manufacturing method for fast bipolar analog large integrated circuit

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