JPS5672533A - Latch circuit - Google Patents

Latch circuit

Info

Publication number
JPS5672533A
JPS5672533A JP14890179A JP14890179A JPS5672533A JP S5672533 A JPS5672533 A JP S5672533A JP 14890179 A JP14890179 A JP 14890179A JP 14890179 A JP14890179 A JP 14890179A JP S5672533 A JPS5672533 A JP S5672533A
Authority
JP
Japan
Prior art keywords
circuit
output
rom
inverter circuit
precharge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14890179A
Other languages
Japanese (ja)
Inventor
Isamu Kobayashi
Takashi Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP14890179A priority Critical patent/JPS5672533A/en
Publication of JPS5672533A publication Critical patent/JPS5672533A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096—Synchronous circuits, i.e. using clock signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Read Only Memory (AREA)
  • Logic Circuits (AREA)
  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To simplify the circuit by providing the MISFET in parallel with the precharge MISFET, on the input side of the clocked inverter circuit, and controlling by the output of the inverter circuit. CONSTITUTION:The MISFETQ2 controlled by the output of the clocked inverter circuit IN1 which inputs the dynamic output signal OUT of the ROM, and the MISFETQ1 controlled by the precharge signal phiP are connected in parallel. And the clock pulse phi' of the circuit IN1 rises later than the timing by which the FETQ1 is turned off and the output level is obtained, and rises by sunchronizing with the next precharge operation start timing. Accordingly, the same logical design as the static ROM can be executed and the circuit can be designed easily by only adding a simple circuit to the dynamic ROM.
JP14890179A 1979-11-19 1979-11-19 Latch circuit Pending JPS5672533A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14890179A JPS5672533A (en) 1979-11-19 1979-11-19 Latch circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14890179A JPS5672533A (en) 1979-11-19 1979-11-19 Latch circuit

Publications (1)

Publication Number Publication Date
JPS5672533A true JPS5672533A (en) 1981-06-16

Family

ID=15463198

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14890179A Pending JPS5672533A (en) 1979-11-19 1979-11-19 Latch circuit

Country Status (1)

Country Link
JP (1) JPS5672533A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60236196A (en) * 1984-05-09 1985-11-22 Mitsubishi Electric Corp Semiconductor circuit
JPS62262518A (en) * 1986-05-08 1987-11-14 Nec Corp Decoder

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60236196A (en) * 1984-05-09 1985-11-22 Mitsubishi Electric Corp Semiconductor circuit
JPS62262518A (en) * 1986-05-08 1987-11-14 Nec Corp Decoder

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