JPS5668874A - Initial value set system of white level follower circuit - Google Patents

Initial value set system of white level follower circuit

Info

Publication number
JPS5668874A
JPS5668874A JP14475879A JP14475879A JPS5668874A JP S5668874 A JPS5668874 A JP S5668874A JP 14475879 A JP14475879 A JP 14475879A JP 14475879 A JP14475879 A JP 14475879A JP S5668874 A JPS5668874 A JP S5668874A
Authority
JP
Japan
Prior art keywords
maximum value
initial value
circuit
white level
binary number
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14475879A
Other languages
Japanese (ja)
Other versions
JPS619672B2 (en
Inventor
Norio Kanemitsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14475879A priority Critical patent/JPS5668874A/en
Publication of JPS5668874A publication Critical patent/JPS5668874A/en
Publication of JPS619672B2 publication Critical patent/JPS619672B2/ja
Granted legal-status Critical Current

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Abstract

PURPOSE: To give the number of degrees of freedom to form design, by detecting the maximum value of the optical reflection factor in a designated area of the input picture and by determining an initial value of the white level follower circuit on a basis of this detected maximum value and by setting the initial value with a simple circuit constituion.
CONSTITUTION: The input picture of form 1 is scanned by image sensor 3, and the picture signal which was subjected to photoelectric conversion is applied to A/D converter 5 through amplifier 4 and is quantized to a binary. The output of converter 5 is supplied to encoder 20, and the picture signal is converted to the binary number of prescribed bits, and the binary number is supplied to maximum value detecting circuit 21. The maximum value of the optical reflection factor in a designated area of the input picture is detected by detecting circuit 21 and memory 22, and this detected maximum value is input to converting circuit 23 and is converted to the binary number of prescribed bits, and this converted binary number is defined as the initial set value of the white level (reference voltage), thus setting the initial value with a simple circuit to give the number of degrees of freedom to form design.
COPYRIGHT: (C)1981,JPO&Japio
JP14475879A 1979-11-08 1979-11-08 Initial value set system of white level follower circuit Granted JPS5668874A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14475879A JPS5668874A (en) 1979-11-08 1979-11-08 Initial value set system of white level follower circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14475879A JPS5668874A (en) 1979-11-08 1979-11-08 Initial value set system of white level follower circuit

Publications (2)

Publication Number Publication Date
JPS5668874A true JPS5668874A (en) 1981-06-09
JPS619672B2 JPS619672B2 (en) 1986-03-25

Family

ID=15369704

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14475879A Granted JPS5668874A (en) 1979-11-08 1979-11-08 Initial value set system of white level follower circuit

Country Status (1)

Country Link
JP (1) JPS5668874A (en)

Also Published As

Publication number Publication date
JPS619672B2 (en) 1986-03-25

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