JPS5668813A - Timing formation circuit - Google Patents

Timing formation circuit

Info

Publication number
JPS5668813A
JPS5668813A JP14439579A JP14439579A JPS5668813A JP S5668813 A JPS5668813 A JP S5668813A JP 14439579 A JP14439579 A JP 14439579A JP 14439579 A JP14439579 A JP 14439579A JP S5668813 A JPS5668813 A JP S5668813A
Authority
JP
Japan
Prior art keywords
timing
circuit
formation
formation circuit
resolution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14439579A
Other languages
Japanese (ja)
Inventor
Kaneichi Otsuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP14439579A priority Critical patent/JPS5668813A/en
Publication of JPS5668813A publication Critical patent/JPS5668813A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To produce a timing pulse having a higher resolution than the cycle of the working block, by using several units of the timing formation circuit consisting of the counter circuit, ROM and D type FF.
CONSTITUTION: The two sets of the timing formation circuits are constituted with the counter circuits 11 and 12, ROMs 21 and 22 plus D type FFs 31 and 32. The working clocks C1 and C2 of each timing formation circuit are set with a delay with every cycle tO of the basic clock, and at the same time the outputs T1 and T2 of each timing formation circuit are given to the combination logic circuit 4. In such formation of the circuit, the timing pulse having the resolution tO can be produced through a unit of the timing formation circuit although only the timing pulse of resolution 2tO is so far produced.
COPYRIGHT: (C)1981,JPO&Japio
JP14439579A 1979-11-09 1979-11-09 Timing formation circuit Pending JPS5668813A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14439579A JPS5668813A (en) 1979-11-09 1979-11-09 Timing formation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14439579A JPS5668813A (en) 1979-11-09 1979-11-09 Timing formation circuit

Publications (1)

Publication Number Publication Date
JPS5668813A true JPS5668813A (en) 1981-06-09

Family

ID=15361150

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14439579A Pending JPS5668813A (en) 1979-11-09 1979-11-09 Timing formation circuit

Country Status (1)

Country Link
JP (1) JPS5668813A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5985527A (en) * 1982-11-08 1984-05-17 Nec Corp Timing generating circuit
JPS6049421A (en) * 1983-08-30 1985-03-18 Fujitsu Ltd Generating system of timing pulse
US6934674B1 (en) 1999-09-24 2005-08-23 Mentor Graphics Corporation Clock generation and distribution in an emulation system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5985527A (en) * 1982-11-08 1984-05-17 Nec Corp Timing generating circuit
JPH0474736B2 (en) * 1982-11-08 1992-11-27
JPS6049421A (en) * 1983-08-30 1985-03-18 Fujitsu Ltd Generating system of timing pulse
US6934674B1 (en) 1999-09-24 2005-08-23 Mentor Graphics Corporation Clock generation and distribution in an emulation system

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