JPS5667959A - Mos dynamic random access memory - Google Patents

Mos dynamic random access memory

Info

Publication number
JPS5667959A
JPS5667959A JP14347679A JP14347679A JPS5667959A JP S5667959 A JPS5667959 A JP S5667959A JP 14347679 A JP14347679 A JP 14347679A JP 14347679 A JP14347679 A JP 14347679A JP S5667959 A JPS5667959 A JP S5667959A
Authority
JP
Japan
Prior art keywords
gate
mos
capacitance
layer polysilicon
constituting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14347679A
Other languages
Japanese (ja)
Inventor
Kazuyasu Fujishima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP14347679A priority Critical patent/JPS5667959A/en
Publication of JPS5667959A publication Critical patent/JPS5667959A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To prevent unequality of a cell capacitance by a method wherein a separating gate is used to separate a word line of an MOS dynamic RAM from a memory cell and an MOS capacitance is constituted with the 2nd layer polysilicon gate. CONSTITUTION:An 1-transistor 1-capacitor type memory cell consists of an N<+> diffusion area 11 constituting a bit line, the 1st layer polysilicon gate 12 constituting a word line, a separating gate 16 wherein a VSS voltage is applied to separate each memory cell one another, the 2nd layer polysilicon gate 13 constituting an MOS capacitor and a gate oxide film 14. And during the 1st layer polysilicon gate being formed, each of the gate are of a transfer transistor, the area of an MOS capacitor and the area of an N<+> diffusion layer is decided and they are equal without depending upon an error of a mask matching, thus, resulting in each equal cell capacitance and each equal bit line capacitance.
JP14347679A 1979-11-05 1979-11-05 Mos dynamic random access memory Pending JPS5667959A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14347679A JPS5667959A (en) 1979-11-05 1979-11-05 Mos dynamic random access memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14347679A JPS5667959A (en) 1979-11-05 1979-11-05 Mos dynamic random access memory

Publications (1)

Publication Number Publication Date
JPS5667959A true JPS5667959A (en) 1981-06-08

Family

ID=15339578

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14347679A Pending JPS5667959A (en) 1979-11-05 1979-11-05 Mos dynamic random access memory

Country Status (1)

Country Link
JP (1) JPS5667959A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH022666A (en) * 1987-12-23 1990-01-08 Texas Instr Inc <Ti> Mos transistor having improved resolution
JPH02153565A (en) * 1988-07-08 1990-06-13 Mitsubishi Electric Corp Semiconductor memory device
JP2001036034A (en) * 1999-07-19 2001-02-09 Hitachi Ltd Semiconductor device and its manufacture

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH022666A (en) * 1987-12-23 1990-01-08 Texas Instr Inc <Ti> Mos transistor having improved resolution
JPH02153565A (en) * 1988-07-08 1990-06-13 Mitsubishi Electric Corp Semiconductor memory device
JP2001036034A (en) * 1999-07-19 2001-02-09 Hitachi Ltd Semiconductor device and its manufacture

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