JPS5667533U - - Google Patents
Info
- Publication number
- JPS5667533U JPS5667533U JP1980125130U JP12513080U JPS5667533U JP S5667533 U JPS5667533 U JP S5667533U JP 1980125130 U JP1980125130 U JP 1980125130U JP 12513080 U JP12513080 U JP 12513080U JP S5667533 U JPS5667533 U JP S5667533U
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/08—Clock generators with changeable or programmable clock frequency
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/64—Generators producing trains of pulses, i.e. finite sequences of pulses
- H03K3/72—Generators producing trains of pulses, i.e. finite sequences of pulses with means for varying repetition rate of trains
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/04—Shaping pulses by increasing duration; by decreasing duration
- H03K5/06—Shaping pulses by increasing duration; by decreasing duration by the use of delay lines or other analogue delay elements
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Pulse Circuits (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Manipulation Of Pulses (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/071,810 US4316148A (en) | 1979-09-04 | 1979-09-04 | Variable frequency logic clock |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5667533U true JPS5667533U (esLanguage) | 1981-06-05 |
Family
ID=22103742
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1980125130U Pending JPS5667533U (esLanguage) | 1979-09-04 | 1980-09-04 | |
| JP62014332A Granted JPS62187920A (ja) | 1979-09-04 | 1987-01-26 | 可変周波数クロツク信号発生器 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62014332A Granted JPS62187920A (ja) | 1979-09-04 | 1987-01-26 | 可変周波数クロツク信号発生器 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US4316148A (esLanguage) |
| JP (2) | JPS5667533U (esLanguage) |
| CA (1) | CA1142239A (esLanguage) |
| DE (1) | DE3032568C2 (esLanguage) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4414637A (en) * | 1981-01-13 | 1983-11-08 | Honeywell Information Systems Inc. | Adjustable clock system having a dynamically selectable clock period |
| US4684897A (en) * | 1984-01-03 | 1987-08-04 | Raytheon Company | Frequency correction apparatus |
| US4587531A (en) * | 1984-11-05 | 1986-05-06 | Eastman Kodak Company | Clock signal producing apparatus |
| US4868514A (en) * | 1987-11-17 | 1989-09-19 | International Business Machines Corporation | Apparatus and method for digital compensation of oscillator drift |
| GB8818665D0 (en) * | 1988-08-05 | 1988-09-07 | Crosfield Electronics Ltd | Methods & apparatus for synchronising clock signals |
| DE3843261A1 (de) * | 1988-12-22 | 1990-06-28 | Ant Nachrichtentech | Schaltungsanordnung zur steuerung der phase eines taktsignals |
| GB2234371A (en) * | 1989-07-07 | 1991-01-30 | Inmos Ltd | Clock generation |
| US5126592A (en) * | 1989-10-05 | 1992-06-30 | Nguyen Nam K | Circuit having a delay line for use in a data processing system or logic system |
| EP0570158B1 (en) * | 1992-05-08 | 2000-01-19 | National Semiconductor Corporation | Frequency multiplication circuit and method for generating a stable clock signal |
| US6064707A (en) | 1995-12-22 | 2000-05-16 | Zilog, Inc. | Apparatus and method for data synchronizing and tracking |
| CN100422901C (zh) * | 2004-03-04 | 2008-10-01 | Nxp股份有限公司 | 可编程时钟生成 |
| TWI257482B (en) * | 2004-12-15 | 2006-07-01 | Spirox Corp | Method and apparatus for measuring jitter of signal |
| US10633730B2 (en) | 2014-09-05 | 2020-04-28 | Jfe Steel Corporation | Material for cold-rolled stainless steel sheet |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DD65949A (esLanguage) * | ||||
| US3422423A (en) * | 1965-01-04 | 1969-01-14 | Sperry Rand Corp | Digital-to-analog converter |
| US4165490A (en) * | 1977-12-19 | 1979-08-21 | International Business Machines Corporation | Clock pulse generator with selective pulse delay and pulse width control |
-
1979
- 1979-09-04 US US06/071,810 patent/US4316148A/en not_active Expired - Lifetime
-
1980
- 1980-04-30 CA CA000350922A patent/CA1142239A/en not_active Expired
- 1980-08-29 DE DE3032568A patent/DE3032568C2/de not_active Expired
- 1980-09-04 JP JP1980125130U patent/JPS5667533U/ja active Pending
-
1987
- 1987-01-26 JP JP62014332A patent/JPS62187920A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| DE3032568A1 (de) | 1981-03-19 |
| JPS6256529B2 (esLanguage) | 1987-11-26 |
| JPS62187920A (ja) | 1987-08-17 |
| US4316148A (en) | 1982-02-16 |
| DE3032568C2 (de) | 1988-07-07 |
| CA1142239A (en) | 1983-03-01 |