JPS5658335A - Pll - Google Patents

Pll

Info

Publication number
JPS5658335A
JPS5658335A JP13449779A JP13449779A JPS5658335A JP S5658335 A JPS5658335 A JP S5658335A JP 13449779 A JP13449779 A JP 13449779A JP 13449779 A JP13449779 A JP 13449779A JP S5658335 A JPS5658335 A JP S5658335A
Authority
JP
Japan
Prior art keywords
pll
phase comparator
nonmodulation
digital phase
reference signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13449779A
Other languages
Japanese (ja)
Inventor
Norio Numata
Satoshi Yokoya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP13449779A priority Critical patent/JPS5658335A/en
Publication of JPS5658335A publication Critical patent/JPS5658335A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D1/00Demodulation of amplitude-modulated oscillations
    • H03D1/22Homodyne or synchrodyne circuits
    • H03D1/2209Decoders for simultaneous demodulation and decoding of signals composed of a sum-signal and a suppressed carrier, amplitude modulated by a difference signal, e.g. stereocoders
    • H03D1/2236Decoders for simultaneous demodulation and decoding of signals composed of a sum-signal and a suppressed carrier, amplitude modulated by a difference signal, e.g. stereocoders using a phase locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Stereophonic System (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To enable to obtain the reference signal of nonmodulation up to a low- frequency band, by a cascade connection of the 1st PLL using an analog phase comparator and the 2nd PLL using a digital phase comparator. CONSTITUTION:An input modulation signal is applied to the 1st PLL 20 having broader loop band width consisting of an analog phase comparator 22, and an output of the 1st PLL 20 is applied to the 2nd PLL 30 having narrow loop band width consisting of a digital phase comparator 32 in cascade connection, nonmodulation carrier is obtained as an output. Thus, since the analog phase comparator 22 is strong against noise and capture range is wider for digital phase comparator 32, the reference signal with nonmodulation up to a low-frequency band while having stability against noise and a certain degree of capture range, can be obtained.
JP13449779A 1979-10-18 1979-10-18 Pll Pending JPS5658335A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13449779A JPS5658335A (en) 1979-10-18 1979-10-18 Pll

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13449779A JPS5658335A (en) 1979-10-18 1979-10-18 Pll

Publications (1)

Publication Number Publication Date
JPS5658335A true JPS5658335A (en) 1981-05-21

Family

ID=15129695

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13449779A Pending JPS5658335A (en) 1979-10-18 1979-10-18 Pll

Country Status (1)

Country Link
JP (1) JPS5658335A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60134525A (en) * 1983-12-21 1985-07-17 Matsushita Electric Ind Co Ltd Synchronizing signal circuit
JPS6267927A (en) * 1985-09-19 1987-03-27 Nec Corp Phase synchronizing oscillator
JPS63245127A (en) * 1987-03-31 1988-10-12 Nec Corp Phase locked loop system
JPS6436184A (en) * 1987-07-13 1989-02-07 Rca Licensing Corp Phase locked loop apparatus
JPS6451719A (en) * 1987-08-22 1989-02-28 Kenwood Corp Reproducing circuit for self-synchronizing clock signal

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60134525A (en) * 1983-12-21 1985-07-17 Matsushita Electric Ind Co Ltd Synchronizing signal circuit
JPS6267927A (en) * 1985-09-19 1987-03-27 Nec Corp Phase synchronizing oscillator
JPS63245127A (en) * 1987-03-31 1988-10-12 Nec Corp Phase locked loop system
JPS6436184A (en) * 1987-07-13 1989-02-07 Rca Licensing Corp Phase locked loop apparatus
JPS6451719A (en) * 1987-08-22 1989-02-28 Kenwood Corp Reproducing circuit for self-synchronizing clock signal

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