JPS5650671A - Isolating system of vertical synchronous signal - Google Patents
Isolating system of vertical synchronous signalInfo
- Publication number
- JPS5650671A JPS5650671A JP12001379A JP12001379A JPS5650671A JP S5650671 A JPS5650671 A JP S5650671A JP 12001379 A JP12001379 A JP 12001379A JP 12001379 A JP12001379 A JP 12001379A JP S5650671 A JPS5650671 A JP S5650671A
- Authority
- JP
- Japan
- Prior art keywords
- pulse
- signal
- synchronous signal
- gate
- supplied
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
- H04N5/08—Separation of synchronising signals from picture signals
- H04N5/10—Separation of line synchronising signal from frame synchronising signal or vice versa
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Synchronizing For Television (AREA)
Abstract
PURPOSE:To avoid delivering the signal which is detected by mistake and thus increase the reliability, by detecting the duration of the equivalent pulse and then delivering the vertical synchronous signal when the equivalent pulses are obtained in a prescribed number and within a time set previously. CONSTITUTION:The synchronous signal (a') having the inversed phase is applied to the terminal 1, and the gate pulse (d) of 1/2 the horizontal synchronous signal is applied to the terminal 5. Then the logic product between the signal (a') supplied from the terminals 1 and 2 and the pulse (d) is obtained through the gate 7, and the output pulse (e) is supplied to the pulse duration detector 8. At the same time, the gate pulse (d) is supplied to the detector 8 along with application of the drop-out signal (h) from the terminal 6. Then the pulse (f) is delivered through the detector 8 only when the signal (a') coincides with the equivalent pulse duration to be applied to the counter 9 and the gate pulse generator 10. And the pulses (f) are counted for the period decided by the generator 10, and this count value is judged by the 1st and 2nd decoders 11 and 12. Then the correct vertical synchronous signal (c) is delivered via the pulse delay unit 13.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12001379A JPS5650671A (en) | 1979-09-20 | 1979-09-20 | Isolating system of vertical synchronous signal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12001379A JPS5650671A (en) | 1979-09-20 | 1979-09-20 | Isolating system of vertical synchronous signal |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5650671A true JPS5650671A (en) | 1981-05-07 |
JPS6410154B2 JPS6410154B2 (en) | 1989-02-21 |
Family
ID=14775733
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12001379A Granted JPS5650671A (en) | 1979-09-20 | 1979-09-20 | Isolating system of vertical synchronous signal |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5650671A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61276778A (en) * | 1985-05-31 | 1986-12-06 | Nobuo Naito | Stud welding performance method burying shielding material |
-
1979
- 1979-09-20 JP JP12001379A patent/JPS5650671A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61276778A (en) * | 1985-05-31 | 1986-12-06 | Nobuo Naito | Stud welding performance method burying shielding material |
Also Published As
Publication number | Publication date |
---|---|
JPS6410154B2 (en) | 1989-02-21 |
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