JPS5643753A - Semiconductor memory storage - Google Patents

Abstract

PURPOSE:To prevent the generation of a parasitic MIS effect and obviate the breakdown of information base on the irradiation alpha rays, etc. by a method wherein high concentration regions are formed contacting with a region making up an MIS transistor. CONSTITUTION:The second conduction type (such as N) the first region 23, and the second region 24 consisting of regions 24, 25 are formed to the first conduction type (such as P) semiconductor substrate 21, and P<+> or N<+> third regions 27 with high concentration are made up. P type conductive layers 30 are built up on a main surface 22, the first region 23 and a region 28 of the second region 26 through the first insulating layer 29, and an MISFET(Q) is formed. N type conduction layers 32 connected to the second regions 25 are made up on the third regions 27 through the second insulating layers 31, and capacitor elements C1 are made up. Capacitors C2 may be connected in parallel on the capacitor C1 by insulating layers 33 and the fourth conduction layer 34. Thus, fixed voltage is applied between a conduction layer 36 and the substrate 21, the capacitor C1 and the capacitor C2 are charged by the control signals of the electrodes 30 and informations can be memorized, and the expansion of the depletion layers of the insulating layers 31-35 can be neglected substantially by the existence of the semiconductor region 27.