JPS564247A - Wiring integrated at high degree - Google Patents

Wiring integrated at high degree

Info

Publication number
JPS564247A
JPS564247A JP7910879A JP7910879A JPS564247A JP S564247 A JPS564247 A JP S564247A JP 7910879 A JP7910879 A JP 7910879A JP 7910879 A JP7910879 A JP 7910879A JP S564247 A JPS564247 A JP S564247A
Authority
JP
Japan
Prior art keywords
wiring region
film
width
wiring
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7910879A
Other languages
Japanese (ja)
Inventor
Atsushi Iwamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP7910879A priority Critical patent/JPS564247A/en
Publication of JPS564247A publication Critical patent/JPS564247A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To reduce the area of a wiring region, by increasing the thickness of a film on only the heavy current porton of the wiring region to increase the effective current density of unit width and decrease the layer resistance. CONSTITUTION:An Al film is selectively produced on only the heavy current portion 1 of a wiring region. Subsequently, another Al film is selectively provided on the entire wiring region so that the film thickness on the portion 1 is twice larger than that on the other portion. Therefore, the current capacity of the portion is twice higher than that of the other portion and the layer resistance of the former portion is reduced to a half and the wiring layer width of the former portion may be a half of that of the width of a single layer. This results in greatly reducing the area of the wiring region.
JP7910879A 1979-06-25 1979-06-25 Wiring integrated at high degree Pending JPS564247A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7910879A JPS564247A (en) 1979-06-25 1979-06-25 Wiring integrated at high degree

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7910879A JPS564247A (en) 1979-06-25 1979-06-25 Wiring integrated at high degree

Publications (1)

Publication Number Publication Date
JPS564247A true JPS564247A (en) 1981-01-17

Family

ID=13680698

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7910879A Pending JPS564247A (en) 1979-06-25 1979-06-25 Wiring integrated at high degree

Country Status (1)

Country Link
JP (1) JPS564247A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63147120U (en) * 1987-03-19 1988-09-28
JPH02102535A (en) * 1988-10-12 1990-04-16 Nec Corp Semiconductor integrated circuit device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63147120U (en) * 1987-03-19 1988-09-28
JPH02102535A (en) * 1988-10-12 1990-04-16 Nec Corp Semiconductor integrated circuit device

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