JPS5631300A - Monaural signal-false stereo signal converting circuit - Google Patents

Monaural signal-false stereo signal converting circuit

Info

Publication number
JPS5631300A
JPS5631300A JP10776779A JP10776779A JPS5631300A JP S5631300 A JPS5631300 A JP S5631300A JP 10776779 A JP10776779 A JP 10776779A JP 10776779 A JP10776779 A JP 10776779A JP S5631300 A JPS5631300 A JP S5631300A
Authority
JP
Japan
Prior art keywords
speaker
signal
false
converting circuit
monaural
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10776779A
Other languages
Japanese (ja)
Inventor
Yutaka Haramoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Original Assignee
Victor Company of Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd filed Critical Victor Company of Japan Ltd
Priority to JP10776779A priority Critical patent/JPS5631300A/en
Publication of JPS5631300A publication Critical patent/JPS5631300A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04SSTEREOPHONIC SYSTEMS 
    • H04S5/00Pseudo-stereo systems, e.g. in which additional channel signals are derived from monophonic signals by means of phase shifting, time delay or reverberation 

Abstract

PURPOSE:To improve the stereo effect, by supplying a false stereo signal to an orientation information adding circuit and by orientating it outside the extension range of the actual speaker. CONSTITUTION:The monaural signal input from terminal 1 is taken out as inphase and antiphase signals through monaural signal-false stereo signal converting circuit 6. These signals are input to orientation information adding circuit 7, and the ratio of transmission functions Ai and Bi is set to the differential characteristic between both ears to extend the spread of the acoustic image dependent upon a virtual speaker. Reproducing speaker cancelling circuit 8 sets the ratio of transfer functions A and B to the differential characteristic between both ears and prevents the reproducing sound from being mixed with the sound from the virtual speaker. Consequently, the virtual speaker is orientated outside the extension range of the actual speaker, so that a sufficient stereo effect can be obtained even if two speaker places are narrow.
JP10776779A 1979-08-24 1979-08-24 Monaural signal-false stereo signal converting circuit Pending JPS5631300A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10776779A JPS5631300A (en) 1979-08-24 1979-08-24 Monaural signal-false stereo signal converting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10776779A JPS5631300A (en) 1979-08-24 1979-08-24 Monaural signal-false stereo signal converting circuit

Publications (1)

Publication Number Publication Date
JPS5631300A true JPS5631300A (en) 1981-03-30

Family

ID=14467478

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10776779A Pending JPS5631300A (en) 1979-08-24 1979-08-24 Monaural signal-false stereo signal converting circuit

Country Status (1)

Country Link
JP (1) JPS5631300A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59129299U (en) * 1983-02-18 1984-08-30 日本放送協会 sound image control device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59129299U (en) * 1983-02-18 1984-08-30 日本放送協会 sound image control device
JPH0535680Y2 (en) * 1983-02-18 1993-09-09

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